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@@ -1552,8 +1552,8 @@ implementation
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loadbitsize:=loadsize.size*8;
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{ load the (first part) of the bit sequence }
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- valuereg:=getintregister(list,osuinttype);
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- a_load_ref_reg(list,loadsize,osuinttype,sref.ref,valuereg);
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+ valuereg:=getintregister(list,aluuinttype);
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+ a_load_ref_reg(list,loadsize,aluuinttype,sref.ref,valuereg);
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if not extra_load then
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begin
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@@ -1562,7 +1562,7 @@ implementation
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begin
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{ use subsetreg routine, it may have been overridden with an optimized version }
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tosreg.subsetreg:=valuereg;
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- tosreg.subsetregsize:=def_cgsize(osuinttype);
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+ tosreg.subsetregsize:=def_cgsize(aluuinttype);
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{ subsetregs always count bits from right to left }
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if (target_info.endian=endian_big) then
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tosreg.startbit:=loadbitsize-(sref.startbit+sref.bitlen)
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@@ -1578,40 +1578,40 @@ implementation
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internalerror(2006081510);
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if (target_info.endian=endian_big) then
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begin
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- a_op_reg_reg(list,OP_SHL,osuinttype,sref.bitindexreg,valuereg);
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+ a_op_reg_reg(list,OP_SHL,aluuinttype,sref.bitindexreg,valuereg);
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if is_signed(fromsubsetsize) then
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begin
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{ sign extend to entire register }
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- a_op_const_reg(list,OP_SHL,osuinttype,AIntBits-loadbitsize,valuereg);
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- a_op_const_reg(list,OP_SAR,osuinttype,AIntBits-sref.bitlen,valuereg);
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+ a_op_const_reg(list,OP_SHL,aluuinttype,AIntBits-loadbitsize,valuereg);
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+ a_op_const_reg(list,OP_SAR,aluuinttype,AIntBits-sref.bitlen,valuereg);
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end
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else
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- a_op_const_reg(list,OP_SHR,osuinttype,loadbitsize-sref.bitlen,valuereg);
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+ a_op_const_reg(list,OP_SHR,aluuinttype,loadbitsize-sref.bitlen,valuereg);
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end
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else
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begin
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- a_op_reg_reg(list,OP_SHR,osuinttype,sref.bitindexreg,valuereg);
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+ a_op_reg_reg(list,OP_SHR,aluuinttype,sref.bitindexreg,valuereg);
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if is_signed(fromsubsetsize) then
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begin
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- a_op_const_reg(list,OP_SHL,osuinttype,AIntBits-sref.bitlen,valuereg);
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- a_op_const_reg(list,OP_SAR,osuinttype,AIntBits-sref.bitlen,valuereg);
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+ a_op_const_reg(list,OP_SHL,aluuinttype,AIntBits-sref.bitlen,valuereg);
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+ a_op_const_reg(list,OP_SAR,aluuinttype,AIntBits-sref.bitlen,valuereg);
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end
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end;
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{ mask other bits/sign extend }
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if not is_signed(fromsubsetsize) then
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- a_op_const_reg(list,OP_AND,osuinttype,tcgint((aword(1) shl sref.bitlen)-1),valuereg);
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+ a_op_const_reg(list,OP_AND,aluuinttype,tcgint((aword(1) shl sref.bitlen)-1),valuereg);
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end
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end
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else
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begin
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{ load next value as well }
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- extra_value_reg:=getintregister(list,osuinttype);
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+ extra_value_reg:=getintregister(list,aluuinttype);
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if (sref.bitindexreg=NR_NO) then
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begin
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tmpref:=sref.ref;
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inc(tmpref.offset,loadbitsize div 8);
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- a_load_ref_reg(list,loadsize,osuinttype,tmpref,extra_value_reg);
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+ a_load_ref_reg(list,loadsize,aluuinttype,tmpref,extra_value_reg);
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{ can be overridden to optimize }
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a_load_subsetref_regs_noindex(list,fromsubsetsize,loadbitsize,sref,valuereg,extra_value_reg)
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end
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@@ -1633,7 +1633,7 @@ implementation
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{$else}
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{ can't juggle with register sizes, they are actually typed entities
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here }
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- a_load_reg_reg(list,osuinttype,tosize,valuereg,destreg);
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+ a_load_reg_reg(list,aluuinttype,tosize,valuereg,destreg);
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{$endif}
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end;
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