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@@ -94,7 +94,7 @@ interface
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TCg64Sparc=class(tcg64f32)
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TCg64Sparc=class(tcg64f32)
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private
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private
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- procedure get_64bit_ops(op:TOpCG;var op1,op2:TAsmOp);
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+ procedure get_64bit_ops(op:TOpCG;var op1,op2:TAsmOp;checkoverflow : boolean);
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public
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public
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procedure a_load64_reg_ref(list : taasmoutput;reg : tregister64;const ref : treference);override;
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procedure a_load64_reg_ref(list : taasmoutput;reg : tregister64;const ref : treference);override;
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procedure a_load64_ref_reg(list : taasmoutput;const ref : treference;reg : tregister64);override;
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procedure a_load64_ref_reg(list : taasmoutput;const ref : treference;reg : tregister64);override;
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@@ -103,6 +103,8 @@ interface
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procedure a_op64_const_reg(list:TAasmOutput;op:TOpCG;value:int64;regdst:TRegister64);override;
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procedure a_op64_const_reg(list:TAasmOutput;op:TOpCG;value:int64;regdst:TRegister64);override;
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procedure a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : int64;regsrc,regdst : tregister64);override;
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procedure a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : int64;regsrc,regdst : tregister64);override;
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procedure a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);override;
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procedure a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);override;
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+ procedure a_op64_const_reg_reg_checkoverflow(list: taasmoutput;op:TOpCG;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);override;
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+ procedure a_op64_reg_reg_reg_checkoverflow(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);override;
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end;
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end;
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const
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const
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@@ -1346,18 +1348,24 @@ implementation
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end;
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end;
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- procedure TCg64Sparc.get_64bit_ops(op:TOpCG;var op1,op2:TAsmOp);
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+ procedure TCg64Sparc.get_64bit_ops(op:TOpCG;var op1,op2:TAsmOp;checkoverflow : boolean);
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begin
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begin
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case op of
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case op of
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OP_ADD :
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OP_ADD :
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begin
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begin
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op1:=A_ADDCC;
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op1:=A_ADDCC;
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- op2:=A_ADDX;
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+ if checkoverflow then
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+ op2:=A_ADDXCC
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+ else
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+ op2:=A_ADDX;
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end;
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end;
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OP_SUB :
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OP_SUB :
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begin
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begin
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op1:=A_SUBCC;
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op1:=A_SUBCC;
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- op2:=A_SUBX;
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+ if checkoverflow then
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+ op2:=A_SUBXCC
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+ else
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+ op2:=A_SUBX;
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end;
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end;
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OP_XOR :
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OP_XOR :
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begin
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begin
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@@ -1399,7 +1407,7 @@ implementation
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exit;
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exit;
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end;
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end;
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end;
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end;
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- get_64bit_ops(op,op1,op2);
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+ get_64bit_ops(op,op1,op2,false);
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list.concat(taicpu.op_reg_reg_reg(op1,regdst.reglo,regsrc.reglo,regdst.reglo));
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list.concat(taicpu.op_reg_reg_reg(op1,regdst.reglo,regsrc.reglo,regdst.reglo));
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list.concat(taicpu.op_reg_reg_reg(op2,regdst.reghi,regsrc.reghi,regdst.reghi));
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list.concat(taicpu.op_reg_reg_reg(op2,regdst.reghi,regsrc.reghi,regdst.reghi));
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end;
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end;
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@@ -1414,13 +1422,29 @@ implementation
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OP_NOT :
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OP_NOT :
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internalerror(200306017);
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internalerror(200306017);
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end;
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end;
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- get_64bit_ops(op,op1,op2);
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+ get_64bit_ops(op,op1,op2,false);
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tcgsparc(cg).handle_reg_const_reg(list,op1,regdst.reglo,aint(lo(value)),regdst.reglo);
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tcgsparc(cg).handle_reg_const_reg(list,op1,regdst.reglo,aint(lo(value)),regdst.reglo);
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tcgsparc(cg).handle_reg_const_reg(list,op2,regdst.reghi,aint(hi(value)),regdst.reghi);
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tcgsparc(cg).handle_reg_const_reg(list,op2,regdst.reghi,aint(hi(value)),regdst.reghi);
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end;
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end;
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procedure tcg64sparc.a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : int64; regsrc,regdst : tregister64);
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procedure tcg64sparc.a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : int64; regsrc,regdst : tregister64);
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+ var
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+ l : tlocation;
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+ begin
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+ a_op64_const_reg_reg_checkoverflow(list,op,value,regsrc,regdst,false,l);
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+ end;
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+
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+
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+ procedure tcg64sparc.a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);
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+ var
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+ l : tlocation;
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+ begin
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+ a_op64_reg_reg_reg_checkoverflow(list,op,regsrc1,regsrc2,regdst,false,l);
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+ end;
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+
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+
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+ procedure tcg64sparc.a_op64_const_reg_reg_checkoverflow(list: taasmoutput;op:TOpCG;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
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var
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var
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op1,op2:TAsmOp;
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op1,op2:TAsmOp;
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begin
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begin
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@@ -1429,13 +1453,13 @@ implementation
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OP_NOT :
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OP_NOT :
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internalerror(200306017);
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internalerror(200306017);
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end;
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end;
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- get_64bit_ops(op,op1,op2);
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+ get_64bit_ops(op,op1,op2,setflags);
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tcgsparc(cg).handle_reg_const_reg(list,op1,regsrc.reglo,aint(lo(value)),regdst.reglo);
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tcgsparc(cg).handle_reg_const_reg(list,op1,regsrc.reglo,aint(lo(value)),regdst.reglo);
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tcgsparc(cg).handle_reg_const_reg(list,op2,regsrc.reghi,aint(hi(value)),regdst.reghi);
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tcgsparc(cg).handle_reg_const_reg(list,op2,regsrc.reghi,aint(hi(value)),regdst.reghi);
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end;
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end;
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- procedure tcg64sparc.a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);
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+ procedure tcg64sparc.a_op64_reg_reg_reg_checkoverflow(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
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var
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var
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op1,op2:TAsmOp;
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op1,op2:TAsmOp;
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begin
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begin
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@@ -1444,7 +1468,7 @@ implementation
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OP_NOT :
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OP_NOT :
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internalerror(200306017);
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internalerror(200306017);
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end;
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end;
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- get_64bit_ops(op,op1,op2);
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+ get_64bit_ops(op,op1,op2,setflags);
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list.concat(taicpu.op_reg_reg_reg(op1,regsrc2.reglo,regsrc1.reglo,regdst.reglo));
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list.concat(taicpu.op_reg_reg_reg(op1,regsrc2.reglo,regsrc1.reglo,regdst.reglo));
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list.concat(taicpu.op_reg_reg_reg(op2,regsrc2.reghi,regsrc1.reghi,regdst.reghi));
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list.concat(taicpu.op_reg_reg_reg(op2,regsrc2.reghi,regsrc1.reghi,regdst.reghi));
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end;
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end;
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@@ -1456,7 +1480,10 @@ begin
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end.
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end.
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{
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{
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$Log$
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$Log$
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- Revision 1.104 2005-01-25 20:58:30 florian
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+ Revision 1.105 2005-01-27 20:32:51 florian
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+ + implemented overflow checking for 64 bit types on sparc
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+
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+ Revision 1.104 2005/01/25 20:58:30 florian
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* fixed load64 which shouldn't do a make_simple_ref
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* fixed load64 which shouldn't do a make_simple_ref
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Revision 1.103 2005/01/24 22:08:32 peter
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Revision 1.103 2005/01/24 22:08:32 peter
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