 Karoly Balogh
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3cea1706e9
m68k: more work on instruction validation for the internal assembler
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2 سال پیش |
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Karoly Balogh
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459dc68ab9
m68k: more boiler plate and refactor for a future internal assembler
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2 سال پیش |
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Károly Balogh
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55d4ffa9de
m68k: add missing FINT and FINTRZ instructions to spilling_get_operation_type()
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4 سال پیش |
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Károly Balogh
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f20c76d73b
m68k: fixed a long standing issue, where FPU registers would be clamped to single precision during spilling
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5 سال پیش |
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Károly Balogh
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16fc8c8d9a
m68k: added some handling for the explicit precision FPU instructions in the spilling and optimizer. fixed a_fsabs and a_fdabs names
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5 سال پیش |
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Károly Balogh
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87e8010f05
m68k: support 32x32 to 64bit MUL generation when targeting CPUs which support this instruction
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8 سال پیش |
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Károly Balogh
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e9ff684ff0
m68k: handle operand type correctly for 3 operand mul/div
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8 سال پیش |
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Károly Balogh
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07cfb2f43a
m68k: removed unused 3 ops taicpu constructors
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8 سال پیش |
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Károly Balogh
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5237a4d5e2
m68k: support register pair operands in assembler reader and writer, as used by some instructions (mainly DIVS/DIVU and friends) so we don't have to hack them as three operand instructions
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8 سال پیش |
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Károly Balogh
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a2a630e9c5
m68k: fixed and enabled hardware mod/div support for coldfire, also it no longer depends on cpu family but cpu capability
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9 سال پیش |
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Károly Balogh
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e7838dad39
m68k: initial asm-level infrastructure to let the codegenerator output float consts as operands, which is supported on 88x/040/060
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9 سال پیش |
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Károly Balogh
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3e2319ff3a
m68k: do not allocate/free the regset dynamically having it as a normal field is perfectly fine
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9 سال پیش |
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Károly Balogh
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2e64db935a
m68k: BSET and BCLR's dest operand is actually readwrite, not write only. fixes sets with regvars, when the regvar is spilled
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9 سال پیش |
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Károly Balogh
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001dfecdf5
m68k: use isregoverlap in is_same_reg_move, to determine if we're doing a no-op move
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9 سال پیش |
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Károly Balogh
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c49c8210a3
m68k: some initial HLCG, use BSET/BCLR instructions for simple bit manipulation
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10 سال پیش |
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Károly Balogh
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258b42de26
m68k: added support for FSIN/FCOS. these are software supported on the 68040, so we should have a separate 68040/060 FPU option too, to avoid these in the future.
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10 سال پیش |
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Károly Balogh
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997ec578e0
m68k: added a simple unaryminusnode which can utilize FNEG instruction for floats on 68881
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10 سال پیش |
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Károly Balogh
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c72f58bcc5
m68k: implemented sqrt_real and abs_real inlines
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10 سال پیش |
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Károly Balogh
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c062e55aa2
m68k: after a compare on the FPU, move the condition flags back to the CPU. this should make floating point compare actually working
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10 سال پیش |
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Károly Balogh
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a99c9c29b6
m68k: basic 68881 FPU register save/restore support. probably still needs some work here and there.
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10 سال پیش |
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Károly Balogh
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460c4acaee
m68k: implement taicpu.spilling_get_operation_type_ref, supports predecrement/postincrement addressing
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10 سال پیش |
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Károly Balogh
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d000b1bc7c
m68k: basic 68881 fpu support. probably still broken at umpzillion places, and mostly untested, but at least it builds the RTL and all packages successfully with -Cp68020 -Cf68881 instead of dying with random internalerrors() and now even emits actual FPU opcodes.
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10 سال پیش |
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Károly Balogh
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d561e8ab57
m68k: generate smarter shifting/rotation code on 68k, for example by utilizing the SWAP instruction
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11 سال پیش |
 sergei
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b91d965096
* m68k: initial support for ROL/ROR operations, defining 'cpurox' for CPU target can actually enable them. However it cannot be done outright because these instructions do not exits on Coldfire, and internal processing of RoX,Sar,BsX, etc. can not yet be switched depending on CPU subtype.
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11 سال پیش |
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Károly Balogh
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9ec1d4ee89
fixed spilling operation type for some ColdFire instructions
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11 سال پیش |
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Károly Balogh
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aedf2dc20d
fixed spilling operation type for A_LEA, fixes test tb0112 to compile, but still fails to run
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11 سال پیش |
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Károly Balogh
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4c5f273bc5
removed redundant instruction table only used for ugly debug, and the ugly debug code itself
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11 سال پیش |
 florian
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babbc21afd
* fix handling of register sets on m68k: it is required that they are stored as two tcpuregistersets because address registers and data registers have different register types
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11 سال پیش |
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Károly Balogh
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b1b90211f1
fixed spilling operation type for lots of operations (thanks Florian), fixes a few endless loops in the testsuite, at least
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11 سال پیش |
 svenbarth
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ccecf2c13c
Fix comparisons (aka usage of flag/CCR register)
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12 سال پیش |
