Commit History

Author SHA1 Message Date
  Interferon c482bafdaf There is code in the register allocator to restrict register allocation to the 2 years ago
  Interferon 8382c6f586 Added generic WCH32Vx RISC-V processor types using memory size suffixes 2 years ago
  florian 63199a0966 * memory sizes updated 2 years ago
  florian e9ec4a8bb3 * more riscv32-freertos-esp32c3 stuff added 2 years ago
  florian bedd4edc72 + first work for esp32-c3 support 2 years ago
  florian 19ad26afd8 * Riscv32 and Riscv64 on linux: enable safecall support 3 years ago
  florian a16f35dcb1 + support RV32E Extension 3 years ago
  florian def37052f1 + RiscV32: patch by kupferstecher: compiler support of CH32V30*, part of #39777 3 years ago
  florian 27fb9086aa * cleanup: cs_opt_loopunroll is a generic optimization for a long time already 3 years ago
  florian ff3acfb8cd * cleanup of 2.7.0 defines 3 years ago
  Jonas Maebe 592df7fa59 * disable cs_opt_regvar on all platforms when compiled for LLVM (LLVM does 5 years ago
  Jeppe Johansen 2678522db5 - RISC-V: Add controller types for common RV32 MCUs. 5 years ago
  Jeppe Johansen a1a17447ff - Fix bug in 64bit softfloat double negation. 6 years ago
  pierre 828a248287 Systematically include fpcdefs.inc at sart of all units used by compiler 6 years ago
  Jeppe Johansen ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 years ago