 florian
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599ba8cc2a
+ generate initial cfi for aarch64
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%!s(int64=4) %!d(string=hai) anos |
 pierre
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3f19bd693f
+ Add new LastCommonAsmOp constant to arm and aarch64 CPU targets.
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%!s(int64=4) %!d(string=hai) anos |
 Jonas Maebe
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9376f5a43a
* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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%!s(int64=4) %!d(string=hai) anos |
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florian
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9bcff94e9e
* factored out TARMAsmOptimizer.OptPass1UXTB
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%!s(int64=5) %!d(string=hai) anos |
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florian
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e1e8986462
* patch by J. Gareth Moreton, issue #36271, part 3: support for the other architectures
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%!s(int64=5) %!d(string=hai) anos |
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florian
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0c6f7321bf
+ AArch64: FoldShiftProcess optimization
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%!s(int64=6) %!d(string=hai) anos |
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florian
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69786ffe73
somehow committing went wrong, second part of last commit:
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%!s(int64=6) %!d(string=hai) anos |
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Jonas Maebe
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b41cd1eb6a
* synchronised with trunk till r40575
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%!s(int64=6) %!d(string=hai) anos |
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Jonas Maebe
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820d2f7135
* support OS_32/OS_64 in AArch64 cgsize2subreg() for MM registers (can happen
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%!s(int64=6) %!d(string=hai) anos |
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Jonas Maebe
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8555ec1438
+ fpc_eh_return_data_regno() intrinsic to get the return register numbers
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%!s(int64=6) %!d(string=hai) anos |
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florian
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0a5e6d29cb
+ implement assembler optimization Str/LdrAdd/Sub2Str/Ldr Postindex done
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%!s(int64=6) %!d(string=hai) anos |
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pierre
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92acd38f40
Fix for bug report #34380
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%!s(int64=6) %!d(string=hai) anos |
 nickysn
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518cdf9674
* replaced the saved_XXX_registers arrays with virtual methods inside
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%!s(int64=7) %!d(string=hai) anos |
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Jonas Maebe
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7395058cf3
* recognise tb(n)z as branch opcode (patch by Edmund Grimley Evans)
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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bc5a33ffac
* fixed flags_to_cond() and inverse_cond() for C_GE
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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30b0f830c3
* fixed std_param_align
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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96fcf6a12d
* added BL and CB(N)Z to is_calljmp()
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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aa0e2e9170
* fixed cgsize2subreg and cgsize2subreg for mm subreg sizes
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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c2b1ff41d5
- removed ARM leftover tspecialregflag type
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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4c504098ca
+ C_CS/C_CC condition and F_HS/F_LO flag aliases
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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6e55e8356e
+ IP0/IP1 register aliases
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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de2dd592ab
+ shiftedregmodes and extendedregmodes set constants
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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17bcd207af
* fixed lowercase entry in uppercond2str
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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01a6777530
* simplified flag_2_cond array range
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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51a094a917
+ FP/LR register aliases
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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e6d7c6a62a
+ is_shifter_const() function to determine whether a constant can be encoded
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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d23299af1e
* fixed cgsize2subreg() for integer registers (we can use 32 and 64 bit
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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f5950ac4cd
+ added remaining aarch64 shift/extension modes
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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24d3b1cdf6
+ tcgsizep2size[] to convert a tcgsize to its power-of-2 bytesize
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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a49d386541
+ SW postfix for sign extending a 32 bit integer
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%!s(int64=10) %!d(string=hai) anos |
