 Jonas Maebe
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7c4e7d6bd3
* support OS_32/OS_64 in cgsize2subreg for ARM MM registers to handle
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6 лет назад |
 pierre
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4657f45e74
* Change first parameter type of function is_continuous_maks to aword type.
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6 лет назад |
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pierre
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92acd38f40
Fix for bug report #34380
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6 лет назад |
 florian
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4f5f3c4a09
+ support for vmov.xx vreg,#imm on arm
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7 лет назад |
 nickysn
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518cdf9674
* replaced the saved_XXX_registers arrays with virtual methods inside
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7 лет назад |
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Jonas Maebe
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880d438704
* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can
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8 лет назад |
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florian
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ad71b8348e
* S1..S15 do not need to be marked as volatile as they are sub-registers of double size registers
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9 лет назад |
 Jeppe Johansen
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5ca1740bee
Fix issue in is_thumb32_imm. imm<11:10> have to be non-zero meaning the rotate only works from 8 to 31. Caused 0x8000001F to be mistaken for a valid immediate.
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10 лет назад |
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Jeppe Johansen
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3d7dce81fe
Make MRS and MSR use the right encoding on Thumb architectures.
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10 лет назад |
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Jeppe Johansen
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71cdedea82
Add missing NOP, and B instruction forms.
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10 лет назад |
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Jeppe Johansen
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5c3093a937
Add most non-VFP Thumb-2 instruction entries for the ARM internal writer.
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10 лет назад |
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Jeppe Johansen
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d023c63ad0
Add a lot of instruction table entries and missing instructions for support of most ARM32 mode instructions from ARMv4 up ARMv7A.
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10 лет назад |
 masta
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fb52392e20
Reformat and comment is_thumb32_imm
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11 лет назад |
 svenbarth
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c48d572996
Implement support for saving and restoring address registers.
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11 лет назад |
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florian
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d4968e054b
+ arm: tsettings.instructionset
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12 лет назад |
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florian
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086ae4b999
Merge r22905 and r22906
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12 лет назад |
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florian
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1eeeb309c7
* intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet
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12 лет назад |
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florian
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47d43750e4
* remove unused units from uses statements
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12 лет назад |
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masta
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e327b4581c
Use TRegNameTable instead of array[tregisterindex] of string[10]
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12 лет назад |
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Jeppe Johansen
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4e84431dde
Fix some optimizations which assume that there are 3 operands
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12 лет назад |
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Jeppe Johansen
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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12 лет назад |
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Jeppe Johansen
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a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
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12 лет назад |
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Jeppe Johansen
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3e963a49e2
Added support for IT block merging
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12 лет назад |
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Jeppe Johansen
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9ec9b44784
Add CBNZ/CBZ instructions
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12 лет назад |
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florian
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54d3d736f5
* patch by Jeppe Johansen to add support for handling different flags for xPSR regs,
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13 лет назад |
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masta
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d8af83d252
Introduce a version of MatchInstruction for multiple instructions
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13 лет назад |
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florian
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55e6da6d28
* make cpubase for arm use inlining
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13 лет назад |
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florian
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d8161c185c
+ track usage of flags by using a new register RS_/NR_DEFAULTFLAGS
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13 лет назад |
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masta
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d987cee96a
Introduce split_into_shifter_const to ARM-Code Generator
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13 лет назад |
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masta
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3205169ab9
Use roldword intrinsic instead of function rotl.
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13 лет назад |
