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aasmcpu.pas
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bc0c94c204
fpcdefs.inc: Set fpc_compiler_has_fixup_jmps for powerpcXX and mips CPUs.
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13 lat temu |
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aoptcpu.pas
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0c8546f94c
* more MIPS code of David Zhang integrated
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16 lat temu |
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aoptcpub.pas
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93e0dd9c2f
* Patch from Fuxin Zhang: other mips and mipsel CPUs changes
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13 lat temu |
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aoptcpud.pas
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0c8546f94c
* more MIPS code of David Zhang integrated
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16 lat temu |
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cgcpu.pas
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ffd01794fb
Reserve R25 () register for PIC function calling
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13 lat temu |
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cpubase.pas
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63b4cb3347
+ Add NR/RS _GP and _PIC_FUNC aliases
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13 lat temu |
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cpugas.pas
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c53d07f741
Improve addr_pic support
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13 lat temu |
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cpuinfo.pas
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4d86d25c6c
* -O4 switch for optimizations which are correct but which might have unexpected effects
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13 lat temu |
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cpunode.pas
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86d82a9006
Add reference to new ncpuld unit
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13 lat temu |
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cpupara.pas
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eb1efdff8a
+ introduce cstylearrayofconst because pocall_mwcall was forgotten at several places
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13 lat temu |
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cpupi.pas
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fc81979f61
set got at create of cs_create_pic is used
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13 lat temu |
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cputarg.pas
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c453baf0b9
+ Enable stabs debuginfo, dwarf disabled for now
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13 lat temu |
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hlcgcpu.pas
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7717e43929
* moved setting the call result to a separate method, so it can still be
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13 lat temu |
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itcpugas.pas
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3d2a27c66c
* fix fpu register type
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13 lat temu |
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mipsreg.dat
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944d500d55
Change std reg names to allow use with GAS assembler
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13 lat temu |
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ncpuadd.pas
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93e0dd9c2f
* Patch from Fuxin Zhang: other mips and mipsel CPUs changes
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13 lat temu |
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ncpucall.pas
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56b4977858
Override tcallnode.pass_1 for use of got for cdecl'ared functions (assuming it can be PIC code)
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13 lat temu |
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ncpucnv.pas
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495a6cfebf
Merge of rev21558-59-60 by Foxsen
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13 lat temu |
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ncpuinln.pas
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f54365db94
* adapted more fpc-mips stuff to trunk
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16 lat temu |
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ncpuld.pas
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c2cd8246cb
Override tloadnode.pass_1 to for use of got for shared library variables and genrate_picvaraccess
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13 lat temu |
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ncpumat.pas
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93e0dd9c2f
* Patch from Fuxin Zhang: other mips and mipsel CPUs changes
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13 lat temu |
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ncpuset.pas
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b023627f6a
* converted tcgcasenode.pass_generate_code() to hlcgobj
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14 lat temu |
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opcode.inc
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87b6bb5053
+ Add .cpXXX pseudo-instruction for PIC code
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13 lat temu |
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racpugas.pas
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93e0dd9c2f
* Patch from Fuxin Zhang: other mips and mipsel CPUs changes
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13 lat temu |
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rgcpu.pas
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de4a96f96d
* fixes several register allocation related mips issues
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13 lat temu |
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rmipscon.inc
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de4a96f96d
* fixes several register allocation related mips issues
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13 lat temu |
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rmipsdwf.inc
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f58fcdf401
+ basic mips stuff
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20 lat temu |
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rmipsgas.inc
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ae37b9f5b9
* fix floating point registers gas name
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13 lat temu |
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rmipsgri.inc
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ae37b9f5b9
* fix floating point registers gas name
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13 lat temu |
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rmipsgss.inc
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f58fcdf401
+ basic mips stuff
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20 lat temu |
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rmipsnor.inc
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f58fcdf401
+ basic mips stuff
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20 lat temu |
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rmipsnum.inc
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de4a96f96d
* fixes several register allocation related mips issues
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13 lat temu |
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rmipsrni.inc
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f58fcdf401
+ basic mips stuff
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20 lat temu |
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rmipssri.inc
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944d500d55
Change std reg names to allow use with GAS assembler
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13 lat temu |
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rmipssta.inc
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f58fcdf401
+ basic mips stuff
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20 lat temu |
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rmipsstd.inc
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944d500d55
Change std reg names to allow use with GAS assembler
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13 lat temu |
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rmipssup.inc
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de4a96f96d
* fixes several register allocation related mips issues
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13 lat temu |
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strinst.inc
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87b6bb5053
+ Add .cpXXX pseudo-instruction for PIC code
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13 lat temu |
florian
4d86d25c6c
* -O4 switch for optimizations which are correct but which might have unexpected effects