florian b4fc11fe06 * implemented r30870 for all platforms: pass dyn. array parameters like pointer parameters so typically in a register 10 lat temu
..
aasmcpu.pas b6729a8f0b Workaround for IE 20060521 when building the ARM compiler 10 lat temu
agarmgas.pas 64f127141f Add VFPv4 FPU type for ARM. 10 lat temu
aoptcpu.pas 9e5979e8be Implemented UAL syntax support in the ARM assembler reader. Can be toggled with a field for now, but not implemented yet. Still using pre-UAL syntax for now. 10 lat temu
aoptcpub.pas d37e72dbf9 * ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions. 11 lat temu
aoptcpuc.pas 790a4fe2d3 * log and id tags removed 20 lat temu
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 lat temu
armatt.inc 439027a8de Add most pre-UAL VFP instruction forms. 10 lat temu
armatts.inc ff7af306df Add FPA support. 10 lat temu
armins.dat 439027a8de Add most pre-UAL VFP instruction forms. 10 lat temu
armnop.inc 439027a8de Add most pre-UAL VFP instruction forms. 10 lat temu
armop.inc 439027a8de Add most pre-UAL VFP instruction forms. 10 lat temu
armreg.dat 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
armtab.inc 439027a8de Add most pre-UAL VFP instruction forms. 10 lat temu
cgcpu.pas 61e4a1b811 + added tasmlist parameter to getintparaloc() (needed for llvm) 10 lat temu
cpubase.pas 5ca1740bee Fix issue in is_thumb32_imm. imm<11:10> have to be non-zero meaning the rotate only works from 8 to 31. Caused 0x8000001F to be mistaken for a valid immediate. 10 lat temu
cpuelf.pas 52e505bff7 Fixed internal error in GOT related code for ARM internal assembler. 10 lat temu
cpuinfo.pas 65a69129c5 Add initial support for STM32F429 core 10 lat temu
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: 11 lat temu
cpupara.pas b4fc11fe06 * implemented r30870 for all platforms: pass dyn. array parameters like pointer parameters so typically in a register 10 lat temu
cpupi.pas eeb15fc445 * Added virtual method tprocinfo.postprocess_code and moved target-specific processing from base class into target-specific descendant classes (ARM and AVR, other targets still to do). 11 lat temu
cputarg.pas d26f0552a0 * Sync with trunk r23404. 12 lat temu
hlcgcpu.pas bd203a5b57 * synchronised with trunk till r30240 10 lat temu
itcpugas.pas 47d43750e4 * remove unused units from uses statements 12 lat temu
narmadd.pas 9e5979e8be Implemented UAL syntax support in the ARM assembler reader. Can be toggled with a field for now, but not implemented yet. Still using pre-UAL syntax for now. 10 lat temu
narmcal.pas 8b8a786823 * moved ARM/x86 ifdef'ed code from ncgcal to virtual methods 12 lat temu
narmcnv.pas b222d0b663 * correctly handle LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF in second_int_to_bool, resolves issue #28007 10 lat temu
narmcon.pas b0ff41406a * grouped all tai_real* types into a single tai_realconst type, 11 lat temu
narminl.pas 9079227c56 * don't give an internalerror when trying to prefetch a regvar or even 10 lat temu
narmmat.pas db401f0371 Add missing size postfix to VNEG VFP instruction. 10 lat temu
narmmem.pas d6de2c03cb * generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe 10 lat temu
narmset.pas 6662cb6dd5 ARMv6M was missing alignments for jumptables 10 lat temu
pp.lpi.template 1f032375c3 * improved template with help from Mattias Gaertner 19 lat temu
raarm.pas 780e75bfac o patch by Jeppe Johansen to fix mantis #17472: 14 lat temu
raarmgas.pas 8445381929 * merged ait_set and ait_thumb_set into a single tai class 10 lat temu
rarmcon.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmdwa.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmnor.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmnum.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmrni.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmsri.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmsta.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmstd.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmsup.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rgcpu.pas 201121d7c9 * synchronised with trunk till r30345 10 lat temu
symcpu.pas 7dd1d6aa77 o fixes handling of iso i/o parameters/program parameters: 10 lat temu