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fpc
tükrözi: https://gitlab.com/freepascal.org/fpc/source.git
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Fa: e327b4581c
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fpc
/
compiler
/
arm
masta e327b4581c Use TRegNameTable instead of array[tregisterindex] of string[10] 13 éve
..
aasmcpu.pas 4e84431dde Fix some optimizations which assume that there are 3 operands 13 éve
agarmgas.pas 6497d3c994 - removed no longer used/supported af_allowdirect flag (direct assembler 13 éve
aoptcpu.pas 970405c0f3 o merging r22801 of Jeppe Johansen 13 éve
aoptcpub.pas 7e5b8584cf * set MaxOps to 4 for the optimizer because fpc generates now mla instructions 13 éve
aoptcpuc.pas 790a4fe2d3 * log and id tags removed 20 éve
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 éve
armatt.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 13 éve
armatts.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 13 éve
armins.dat 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 13 éve
armnop.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 13 éve
armop.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 13 éve
armreg.dat 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
armtab.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 13 éve
cgcpu.pas 4e84431dde Fix some optimizations which assume that there are 3 operands 13 éve
cpubase.pas e327b4581c Use TRegNameTable instead of array[tregisterindex] of string[10] 13 éve
cpuinfo.pas 4e84431dde Fix some optimizations which assume that there are 3 operands 13 éve
cpunode.pas 638d0d49c0 + take advantage of the mla instruction when calculating array offsets 13 éve
cpupara.pas a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU 13 éve
cpupi.pas 04543b179f o merge of the branch laksen/arm-embedded of Jeppe Johansen: 13 éve
cputarg.pas afa14de20d + some generic changes preparing for darwin/arm support 17 éve
hlcgcpu.pas 72e9cfee24 * create/destroy also the high level code generator for all architectures, 14 éve
itcpugas.pas e327b4581c Use TRegNameTable instead of array[tregisterindex] of string[10] 13 éve
narmadd.pas a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU 13 éve
narmcal.pas a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU 13 éve
narmcnv.pas a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU 13 éve
narmcon.pas 0d57bba4c9 * fixed ARM and MIPS compilation after r14912 15 éve
narminl.pas a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU 13 éve
narmmat.pas a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU 13 éve
narmmem.pas 638d0d49c0 + take advantage of the mla instruction when calculating array offsets 13 éve
narmset.pas 45383fd32d + a lot missing flag allocs/deallocs added 13 éve
pp.lpi.template 1f032375c3 * improved template with help from Mattias Gaertner 19 éve
raarm.pas 780e75bfac o patch by Jeppe Johansen to fix mantis #17472: 14 éve
raarmgas.pas 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 13 éve
rarmcon.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmdwa.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmnor.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmnum.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmrni.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmsri.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmsta.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmstd.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmsup.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rgcpu.pas 3e963a49e2 Added support for IT block merging 13 éve