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aoptcpu.pas
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63c4bc29ba
* cleanup
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2 weeks ago |
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aoptcpub.pas
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9b0ff05ee8
- get rid of MaxOps, it is redundant with max_operands
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7 years ago |
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aoptcpuc.pas
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ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
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7 years ago |
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aoptcpud.pas
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ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
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7 years ago |
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cgcpu.pas
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b2f5f6ac7d
+ RiscV32: use sext.b if available
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7 months ago |
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cpuinfo.pas
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ca1511b83c
+ RiscV: CPU type rv32imafc added
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1 week ago |
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cpunode.pas
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971d97c179
+ RiscV: make use of the fmv.w.x/fmv.d.x instruction to load 0.0
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8 months ago |
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cpupara.pas
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b7608b045b
* RiscV: push_addr_param unified
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9 months ago |
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cpupi.pas
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281b3ad276
* fix case completeness and unreachable code warnings in compiler that would
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6 years ago |
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cputarg.pas
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bedd4edc72
+ first work for esp32-c3 support
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2 years ago |
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hlcgcpu.pas
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ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
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7 years ago |
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nrv32add.pas
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c83e6c34a9
riscv32: Fix 64bit comparisons
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3 years ago |
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nrv32cal.pas
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44150f43ac
* RISC-V 32 compilation fixed
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7 years ago |
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nrv32cnv.pas
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281b3ad276
* fix case completeness and unreachable code warnings in compiler that would
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6 years ago |
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nrv32mat.pas
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a291347d98
* emit_div/mod_reg_reg_reg takes now three operands
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2 weeks ago |
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nrv32util.pas
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b4a83e29a4
* fixes RiscV32 building
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9 months ago |
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rrv32con.inc
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8d0bdf2f16
+ RiscV: vector registers
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9 months ago |
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rrv32dwa.inc
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8d0bdf2f16
+ RiscV: vector registers
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9 months ago |
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rrv32nor.inc
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8d0bdf2f16
+ RiscV: vector registers
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9 months ago |
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rrv32num.inc
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8d0bdf2f16
+ RiscV: vector registers
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9 months ago |
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rrv32rni.inc
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8d0bdf2f16
+ RiscV: vector registers
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9 months ago |
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rrv32sri.inc
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8d0bdf2f16
+ RiscV: vector registers
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9 months ago |
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rrv32sta.inc
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8d0bdf2f16
+ RiscV: vector registers
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9 months ago |
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rrv32std.inc
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8d0bdf2f16
+ RiscV: vector registers
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9 months ago |
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rrv32sup.inc
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8d0bdf2f16
+ RiscV: vector registers
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9 months ago |
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symcpu.pas
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ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
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7 years ago |
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tripletcpu.pas
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eb7ba1690e
* mark all external assemblers using an LLVM tool using af_llvm
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5 years ago |
florian
ca1511b83c
+ RiscV: CPU type rv32imafc added