aoptcpu.pas 36 KB

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  1. {
  2. Copyright (c) 1998-2004 by Jonas Maebe
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for sparc
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses
  23. cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai, aasmcpu;
  24. Type
  25. TAsmOpSet = set of TAsmOp;
  26. TCpuAsmOptimizer = class(TAsmOptimizer)
  27. function RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean; override;
  28. function GetNextInstructionUsingReg(Current: tai;
  29. var Next: tai; reg: TRegister): Boolean;
  30. function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  31. function TryRemoveMovToRefIndex(var p: tai; next: taicpu): boolean;
  32. function TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
  33. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  34. procedure PeepHoleOptPass2; override;
  35. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  36. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  37. { outputs a debug message into the assembler file }
  38. procedure DebugMsg(const s: string; p: tai);
  39. End;
  40. Implementation
  41. uses
  42. cutils,globtype,globals,aasmbase,cpuinfo,verbose;
  43. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  44. begin
  45. result :=
  46. (instr.typ = ait_instruction) and
  47. (taicpu(instr).opcode = op);
  48. end;
  49. function MatchOperand(const oper: TOper; reg: TRegister): boolean;
  50. begin
  51. result:=(oper.typ=top_reg) and (oper.reg=reg);
  52. end;
  53. function IsSameReg(this,next: taicpu): boolean;
  54. begin
  55. result:=(next.oper[0]^.typ=top_reg) and
  56. (next.oper[1]^.typ=top_reg) and
  57. (next.oper[0]^.reg=next.oper[1]^.reg) and
  58. (next.oper[0]^.reg=this.oper[0]^.reg);
  59. end;
  60. function CanBeCMOV(p: tai; condreg: tregister): boolean;
  61. begin
  62. result:=assigned(p) and (p.typ=ait_instruction) and
  63. ((taicpu(p).opcode in [A_MOV_D,A_MOV_S]) or
  64. (
  65. { register with condition must not be overwritten }
  66. (taicpu(p).opcode=A_MOVE) and
  67. (taicpu(p).oper[0]^.reg<>condreg)
  68. ));
  69. end;
  70. procedure ChangeToCMOV(p: taicpu; cond: tasmcond; reg: tregister);
  71. begin
  72. case cond of
  73. C_COP1TRUE:
  74. case p.opcode of
  75. A_MOV_D: p.opcode:=A_MOVT_D;
  76. A_MOV_S: p.opcode:=A_MOVT_S;
  77. A_MOVE: p.opcode:=A_MOVT;
  78. else
  79. InternalError(2014061701);
  80. end;
  81. C_COP1FALSE:
  82. case p.opcode of
  83. A_MOV_D: p.opcode:=A_MOVF_D;
  84. A_MOV_S: p.opcode:=A_MOVF_S;
  85. A_MOVE: p.opcode:=A_MOVF;
  86. else
  87. InternalError(2014061702);
  88. end;
  89. C_EQ:
  90. case p.opcode of
  91. A_MOV_D: p.opcode:=A_MOVZ_D;
  92. A_MOV_S: p.opcode:=A_MOVZ_S;
  93. A_MOVE: p.opcode:=A_MOVZ;
  94. else
  95. InternalError(2014061703);
  96. end;
  97. C_NE:
  98. case p.opcode of
  99. A_MOV_D: p.opcode:=A_MOVN_D;
  100. A_MOV_S: p.opcode:=A_MOVN_S;
  101. A_MOVE: p.opcode:=A_MOVN;
  102. else
  103. InternalError(2014061704);
  104. end;
  105. else
  106. InternalError(2014061705);
  107. end;
  108. p.ops:=3;
  109. p.loadreg(2,reg);
  110. end;
  111. {$ifdef DEBUG_AOPTCPU}
  112. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  113. begin
  114. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  115. end;
  116. {$else DEBUG_AOPTCPU}
  117. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  118. begin
  119. end;
  120. {$endif DEBUG_AOPTCPU}
  121. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  122. var
  123. p: taicpu;
  124. i: longint;
  125. begin
  126. result:=false;
  127. if not (assigned(hp) and (hp.typ=ait_instruction)) then
  128. exit;
  129. p:=taicpu(hp);
  130. i:=0;
  131. while(i<p.ops) do
  132. begin
  133. case p.oper[I]^.typ of
  134. top_reg:
  135. result:=(p.oper[I]^.reg=reg) and (p.spilling_get_operation_type(I)<>operand_write);
  136. top_ref:
  137. result:=
  138. (p.oper[I]^.ref^.base=reg) or
  139. (p.oper[I]^.ref^.index=reg);
  140. end;
  141. if result then exit; {Bailout if we found something}
  142. Inc(I);
  143. end;
  144. end;
  145. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  146. var
  147. p: taicpu;
  148. begin
  149. p:=taicpu(hp);
  150. result:=false;
  151. if not ((assigned(hp)) and (hp.typ=ait_instruction)) then
  152. exit;
  153. case p.opcode of
  154. { These instructions do not write into a register at all }
  155. A_NOP,
  156. A_C_EQ_D,A_C_EQ_S,A_C_LE_D,A_C_LE_S,A_C_LT_D,A_C_LT_S,
  157. A_BA,A_BC,
  158. A_SB,A_SH,A_SW,A_SWL,A_SWR,A_SWC1,A_SDC1:
  159. exit;
  160. end;
  161. result:=(p.ops>0) and (p.oper[0]^.typ=top_reg) and
  162. (p.oper[0]^.reg=reg);
  163. end;
  164. function TCpuAsmOptimizer.RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean;
  165. var
  166. i : Longint;
  167. begin
  168. result:=false;
  169. for i:=0 to taicpu(p1).ops-1 do
  170. if (taicpu(p1).oper[i]^.typ=top_reg) and (taicpu(p1).oper[i]^.reg=Reg) and (taicpu(p1).spilling_get_operation_type(i) in [operand_write,operand_readwrite]) then
  171. begin
  172. result:=true;
  173. exit;
  174. end;
  175. end;
  176. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  177. var Next: tai; reg: TRegister): Boolean;
  178. begin
  179. Next:=Current;
  180. repeat
  181. Result:=GetNextInstruction(Next,Next);
  182. until {not(cs_opt_level3 in current_settings.optimizerswitches) or} not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  183. (is_calljmp(taicpu(Next).opcode));
  184. end;
  185. function TCpuAsmOptimizer.TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  186. var
  187. next,hp1: tai;
  188. alloc,dealloc: tai_regalloc;
  189. begin
  190. { Fold
  191. op $reg1,...
  192. opcode $reg2,$reg1
  193. dealloc $reg1
  194. into
  195. op $reg2,...
  196. opcode may be A_MOVE, A_MOV_s, A_MOV_d, etc.
  197. }
  198. result:=false;
  199. if (taicpu(p).ops>0) and
  200. GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  201. MatchInstruction(next,opcode) and
  202. MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) and
  203. { the destination register of mov cannot be used between p and next }
  204. (not RegUsedBetween(taicpu(next).oper[0]^.reg,p,next)) then
  205. begin
  206. dealloc:=FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.Next));
  207. if assigned(dealloc) then
  208. begin
  209. { taicpu(p).oper[0]^.reg is not used anymore, try to find its allocation
  210. and remove it if possible }
  211. GetLastInstruction(p,hp1);
  212. asml.Remove(dealloc);
  213. alloc:=FindRegAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  214. if assigned(alloc) then
  215. begin
  216. asml.Remove(alloc);
  217. alloc.free;
  218. dealloc.free;
  219. end
  220. else
  221. asml.InsertAfter(dealloc,p);
  222. { try to move the allocation of the target register }
  223. GetLastInstruction(next,hp1);
  224. alloc:=FindRegAlloc(taicpu(next).oper[0]^.reg,tai(hp1.Next));
  225. if assigned(alloc) then
  226. begin
  227. asml.Remove(alloc);
  228. asml.InsertBefore(alloc,p);
  229. { adjust used regs }
  230. IncludeRegInUsedRegs(taicpu(next).oper[0]^.reg,UsedRegs);
  231. end;
  232. { finally get rid of the mov }
  233. taicpu(p).loadreg(0,taicpu(next).oper[0]^.reg);
  234. DebugMsg('Peephole: Move removed 1',next);
  235. asml.remove(next);
  236. next.free;
  237. result:=true;
  238. end
  239. else // no dealloc found
  240. begin
  241. { try to optimize the typical call sequence
  242. lw $reg, (whatever)
  243. <alloc volatile registers (including $reg!!)>
  244. move $t9,$reg
  245. jalr $t9
  246. if $reg is nonvolatile, its value may be used after call
  247. and we cannot safely replace it with $t9 }
  248. if (opcode=A_MOVE) and
  249. (taicpu(next).oper[0]^.reg=NR_R25) and
  250. GetNextInstruction(next,hp1) and
  251. MatchInstruction(hp1,A_JALR) and
  252. MatchOperand(taicpu(hp1).oper[0]^,NR_R25) and
  253. assigned(FindRegAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) then
  254. begin
  255. taicpu(p).loadreg(0,taicpu(next).oper[0]^.reg);
  256. DebugMsg('Peephole: Move removed 2',next);
  257. asml.remove(next);
  258. next.free;
  259. result:=true;
  260. end;
  261. end;
  262. end;
  263. end;
  264. function TCpuAsmOptimizer.TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
  265. begin
  266. result:=(next.opcode in storeops) and
  267. MatchOperand(next.oper[0]^,taicpu(p).oper[0]^.reg) and
  268. { Ry cannot be modified between move and store }
  269. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  270. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
  271. if result then
  272. begin
  273. next.loadreg(0,taicpu(p).oper[1]^.reg);
  274. DebugMsg('Peephole: Move removed 3',p);
  275. asml.remove(p);
  276. p.free;
  277. p:=next;
  278. end;
  279. end;
  280. function TCpuAsmOptimizer.TryRemoveMovToRefIndex(var p: tai; next: taicpu): boolean;
  281. begin
  282. result:=(next.ops>1) and
  283. (next.oper[1]^.typ=top_ref) and
  284. (next.oper[1]^.ref^.refaddr<>addr_full) and
  285. (next.oper[1]^.ref^.base=taicpu(p).oper[0]^.reg) and
  286. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  287. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
  288. if result then
  289. begin
  290. next.oper[1]^.ref^.base:=taicpu(p).oper[1]^.reg;
  291. DebugMsg('Peephole: Move removed 4',p);
  292. asml.remove(p);
  293. p.free;
  294. p:=next;
  295. end;
  296. end;
  297. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  298. var
  299. next,next2: tai;
  300. begin
  301. result:=false;
  302. case p.typ of
  303. ait_instruction:
  304. begin
  305. case taicpu(p).opcode of
  306. A_BC:
  307. begin
  308. { BEQ/BNE with same register are bogus, but can be generated for code like
  309. "if lo(qwordvar)=cardinal(qwordvar) ...",
  310. optimizations below can also yield them, e.g. if one register was initially R0. }
  311. if (taicpu(p).condition in [C_EQ,C_NE]) and
  312. (taicpu(p).oper[0]^.reg=taicpu(p).oper[1]^.reg) then
  313. begin
  314. if (taicpu(p).condition=C_NE) then
  315. begin
  316. if (taicpu(p).oper[2]^.typ = top_ref) and
  317. (taicpu(p).oper[2]^.ref^.symbol is TAsmLabel) then
  318. TAsmLabel(taicpu(p).oper[2]^.ref^.symbol).decrefs;
  319. RemoveDelaySlot(p);
  320. GetNextInstruction(p,next);
  321. end
  322. else
  323. begin
  324. next:=taicpu.op_sym(A_BA,taicpu(p).oper[2]^.ref^.symbol);
  325. taicpu(next).fileinfo:=taicpu(p).fileinfo;
  326. asml.insertbefore(next,p);
  327. end;
  328. asml.remove(p);
  329. p.Free;
  330. p:=next;
  331. result:=true;
  332. end;
  333. end;
  334. A_SEH:
  335. begin
  336. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  337. MatchInstruction(next,A_SH) and
  338. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) and
  339. (not RegUsedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  340. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  341. begin
  342. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  343. asml.remove(p);
  344. p.free;
  345. p:=next;
  346. result:=true;
  347. end
  348. else
  349. result:=TryRemoveMov(p,A_MOVE);
  350. end;
  351. A_SEB:
  352. { TODO: can be handled similar to A_SEH, but it's almost never encountered }
  353. result:=TryRemoveMov(p,A_MOVE);
  354. A_SLL:
  355. begin
  356. { if this is a sign extension... }
  357. if (taicpu(p).oper[2]^.typ=top_const) and
  358. GetNextInstruction(p,next) and
  359. MatchInstruction(next,A_SRA) and
  360. IsSameReg(taicpu(p),taicpu(next)) and
  361. (taicpu(next).oper[2]^.typ=top_const) and
  362. (taicpu(next).oper[2]^.val=taicpu(p).oper[2]^.val) and
  363. (taicpu(next).oper[2]^.val=16) and
  364. { ...followed by 16-bit store (possibly with PIC simplification, etc. in between) }
  365. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[0]^.reg) and
  366. MatchInstruction(next2,A_SH) and
  367. (taicpu(next2).oper[0]^.typ=top_reg) and
  368. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  369. { the initial register may not be reused }
  370. (not RegUsedBetween(taicpu(p).oper[1]^.reg,next,next2)) then
  371. begin
  372. if Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next2.next))) then
  373. begin
  374. taicpu(next2).loadreg(0,taicpu(p).oper[1]^.reg);
  375. asml.remove(p);
  376. asml.remove(next);
  377. p.free;
  378. next.free;
  379. p:=next2;
  380. result:=true;
  381. end;
  382. end
  383. else
  384. result:=TryRemoveMov(p,A_MOVE);
  385. end;
  386. A_SRL:
  387. begin
  388. { TODO: also kill sign-extensions that follow, both SLL+SRA and SEB/SEH versions }
  389. { Remove 'andi' in sequences
  390. srl Rx,Ry,16
  391. andi Rx,Rx,65535
  392. srl Rx,Ry,24
  393. andi Rx,Rx,255
  394. since 'srl' clears all relevant upper bits }
  395. if (taicpu(p).oper[2]^.typ=top_const) and
  396. GetNextInstruction(p,next) and
  397. MatchInstruction(next,A_ANDI) and
  398. IsSameReg(taicpu(p),taicpu(next)) and
  399. (taicpu(next).oper[2]^.typ=top_const) and
  400. ((
  401. (taicpu(p).oper[2]^.val>=16) and
  402. (taicpu(next).oper[2]^.val=65535)
  403. ) or (
  404. (taicpu(p).oper[2]^.val>=24) and
  405. (taicpu(next).oper[2]^.val=255)
  406. )) then
  407. begin
  408. asml.remove(next);
  409. next.free;
  410. result:=true;
  411. end
  412. else
  413. result:=TryRemoveMov(p,A_MOVE);
  414. end;
  415. A_ANDI:
  416. begin
  417. { Remove sign extension after 'andi' if bit 7/15 of const operand is clear }
  418. if (taicpu(p).oper[2]^.typ=top_const) and
  419. GetNextInstruction(p,next) and
  420. MatchInstruction(next,A_SLL) and
  421. GetNextInstruction(next,next2) and
  422. MatchInstruction(next2,A_SRA) and
  423. IsSameReg(taicpu(p),taicpu(next)) and
  424. IsSameReg(taicpu(p),taicpu(next2)) and
  425. (taicpu(next).oper[2]^.typ=top_const) and
  426. (taicpu(next2).oper[2]^.typ=top_const) and
  427. (taicpu(next).oper[2]^.val=taicpu(next2).oper[2]^.val) and
  428. ((
  429. (taicpu(p).oper[2]^.val<=$7fff) and
  430. (taicpu(next).oper[2]^.val=16)
  431. ) or (
  432. (taicpu(p).oper[2]^.val<=$7f) and
  433. (taicpu(next).oper[2]^.val=24)
  434. )) then
  435. begin
  436. asml.remove(next);
  437. asml.remove(next2);
  438. next.free;
  439. next2.free;
  440. result:=true;
  441. end
  442. { Remove zero extension if register is used only for byte/word memory store }
  443. else if (taicpu(p).oper[2]^.typ=top_const) and
  444. GetNextInstruction(p,next) and
  445. ((taicpu(p).oper[2]^.val=255) and MatchInstruction(next,A_SB)) or
  446. ((taicpu(p).oper[2]^.val=65535) and MatchInstruction(next,A_SH)) and
  447. (taicpu(next).oper[0]^.typ=top_reg) and
  448. (taicpu(next).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  449. assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  450. begin
  451. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  452. asml.remove(p);
  453. p.free;
  454. p:=next;
  455. result:=true;
  456. end
  457. else
  458. result:=TryRemoveMov(p,A_MOVE);
  459. end;
  460. A_MOV_S:
  461. begin
  462. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  463. (next.typ=ait_instruction) then
  464. begin
  465. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SWC1]) then
  466. result:=true;
  467. end;
  468. end;
  469. A_MOV_D:
  470. begin
  471. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  472. (next.typ=ait_instruction) then
  473. begin
  474. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SDC1]) then
  475. result:=true;
  476. end;
  477. end;
  478. A_MOVE:
  479. begin
  480. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  481. (next.typ=ait_instruction) and
  482. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
  483. begin
  484. { MOVE Rx,Ry; store Rx,(ref); dealloc Rx ==> store Ry,(ref) }
  485. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SB,A_SH,A_SW]) then
  486. result:=true
  487. else if TryRemoveMovToRefIndex(p,taicpu(next)) then
  488. result:=true
  489. { MOVE Rx,Ry; opcode Rx,Rx,any ==> opcode Rx,Ry,any
  490. MOVE Rx,Ry; opcode Rx,Rz,Rx ==> opcode Rx,Rz,Ry }
  491. else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU,A_AND,A_ANDI,A_SLLV,A_SRLV,A_SRAV]) and
  492. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
  493. begin
  494. if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  495. begin
  496. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  497. asml.remove(p);
  498. p.free;
  499. p:=next;
  500. result:=true;
  501. end
  502. { TODO: if Ry=NR_R0, this effectively changes instruction into MOVE,
  503. providing further optimization possibilities }
  504. else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) then
  505. begin
  506. taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
  507. asml.remove(p);
  508. p.free;
  509. p:=next;
  510. result:=true;
  511. end;
  512. end
  513. { MOVE Rx,Ry; opcode Rz,Rx,any; dealloc Rx ==> opcode Rz,Ry,any }
  514. else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU,A_SLT,A_SLTU,A_DIV,A_DIVU,
  515. A_SLL,A_SRL,A_SRA,A_SLLV,A_SRLV,A_SRAV,A_AND,A_ANDI,A_OR,A_ORI,A_XOR,A_XORI]) and
  516. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  517. begin
  518. if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  519. begin
  520. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  521. asml.remove(p);
  522. p.free;
  523. p:=next;
  524. result:=true;
  525. end
  526. else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) then
  527. begin
  528. taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
  529. asml.remove(p);
  530. p.free;
  531. p:=next;
  532. result:=true;
  533. end;
  534. end
  535. { MULT[U] and cond.branches must be handled separately due to different operand numbers }
  536. else if (taicpu(next).opcode in [A_MULT,A_MULTU,A_BC]) and
  537. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  538. begin
  539. if MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
  540. begin
  541. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  542. if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  543. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  544. asml.remove(p);
  545. p.free;
  546. p:=next;
  547. result:=true;
  548. end
  549. else if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  550. begin
  551. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  552. if MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
  553. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  554. asml.remove(p);
  555. p.free;
  556. p:=next;
  557. result:=true;
  558. end;
  559. end
  560. else if TryRemoveMov(p,A_MOVE) then
  561. begin
  562. { Ended up with move between same register? Suicide then. }
  563. if (taicpu(p).oper[0]^.reg=taicpu(p).oper[1]^.reg) then
  564. begin
  565. GetNextInstruction(p,next);
  566. asml.remove(p);
  567. p.free;
  568. p:=next;
  569. result:=true;
  570. end;
  571. end;
  572. end;
  573. end;
  574. A_ADDIU:
  575. begin
  576. { ADDIU Rx,Ry,const; load/store Rz,(Rx); dealloc Rx ==> load/store Rz,const(Ry)
  577. ADDIU Rx,Ry,%lo(sym); load/store Rz,(Rx); dealloc Rx ==> load/store Rz,%lo(sym)(Ry)
  578. ADDIU Rx,Ry,const; load Rx,(Rx) ==> load Rx,const(Ry)
  579. ADDIU Rx,Ry,%lo(sym); load Rx,(Rx) ==> load Rx,%lo(sym)(Ry) }
  580. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  581. (next.typ=ait_instruction) and
  582. (taicpu(next).opcode in [A_LB,A_LBU,A_LH,A_LHU,A_LW,A_SB,A_SH,A_SW]) and
  583. (taicpu(p).oper[0]^.reg=taicpu(next).oper[1]^.ref^.base) and
  584. (taicpu(next).oper[1]^.ref^.offset=0) and
  585. (taicpu(next).oper[1]^.ref^.symbol=nil) and
  586. (
  587. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) or
  588. (
  589. (taicpu(p).oper[0]^.reg=taicpu(next).oper[0]^.reg) and
  590. (taicpu(next).opcode in [A_LB,A_LBU,A_LH,A_LHU,A_LW])
  591. )
  592. ) and
  593. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
  594. begin
  595. case taicpu(p).oper[2]^.typ of
  596. top_const:
  597. taicpu(next).oper[1]^.ref^.offset:=taicpu(p).oper[2]^.val;
  598. top_ref:
  599. taicpu(next).oper[1]^.ref^:=taicpu(p).oper[2]^.ref^;
  600. else
  601. InternalError(2014100401);
  602. end;
  603. taicpu(next).oper[1]^.ref^.base:=taicpu(p).oper[1]^.reg;
  604. asml.remove(p);
  605. p.free;
  606. p:=next;
  607. result:=true;
  608. end
  609. else
  610. result:=TryRemoveMov(p,A_MOVE);
  611. end;
  612. A_ADD,A_ADDU,A_OR:
  613. begin
  614. if MatchOperand(taicpu(p).oper[1]^,NR_R0) then
  615. begin
  616. taicpu(p).freeop(1);
  617. taicpu(p).oper[1]:=taicpu(p).oper[2];
  618. taicpu(p).oper[2]:=nil;
  619. taicpu(p).ops:=2;
  620. taicpu(p).opercnt:=2;
  621. taicpu(p).opcode:=A_MOVE;
  622. result:=true;
  623. end
  624. else if MatchOperand(taicpu(p).oper[2]^,NR_R0) then
  625. begin
  626. taicpu(p).freeop(2);
  627. taicpu(p).ops:=2;
  628. taicpu(p).opercnt:=2;
  629. taicpu(p).opcode:=A_MOVE;
  630. result:=true;
  631. end
  632. else
  633. result:=TryRemoveMov(p,A_MOVE);
  634. end;
  635. A_LB,A_LBU,A_LH,A_LHU,A_LW,
  636. A_ADDI,
  637. A_SUB,A_SUBU,
  638. A_SRA,A_SRAV,
  639. A_SRLV,
  640. A_SLLV,
  641. A_MFLO,A_MFHI,
  642. A_AND,A_XOR,A_ORI,A_XORI:
  643. result:=TryRemoveMov(p,A_MOVE);
  644. A_LWC1,
  645. A_ADD_s, A_SUB_s, A_MUL_s, A_DIV_s,
  646. A_ABS_s, A_NEG_s, A_SQRT_s,
  647. A_CVT_s_w, A_CVT_s_l, A_CVT_s_d:
  648. result:=TryRemoveMov(p,A_MOV_s);
  649. A_LDC1,
  650. A_ADD_d, A_SUB_d, A_MUL_d, A_DIV_d,
  651. A_ABS_d, A_NEG_d, A_SQRT_d,
  652. A_CVT_d_w, A_CVT_d_l, A_CVT_d_s:
  653. result:=TryRemoveMov(p,A_MOV_d);
  654. end;
  655. end;
  656. end;
  657. end;
  658. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  659. var
  660. p: tai;
  661. l: longint;
  662. hp1,hp2,hp3: tai;
  663. condition: tasmcond;
  664. condreg: tregister;
  665. begin
  666. { Currently, everything below is mips4+ }
  667. if (current_settings.cputype<cpu_mips4) then
  668. exit;
  669. p:=BlockStart;
  670. ClearUsedRegs;
  671. while (p<>BlockEnd) Do
  672. begin
  673. UpdateUsedRegs(tai(p.next));
  674. case p.typ of
  675. ait_instruction:
  676. begin
  677. case taicpu(p).opcode of
  678. A_BC:
  679. begin
  680. condreg:=NR_NO;
  681. if (taicpu(p).condition in [C_COP1TRUE,C_COP1FALSE]) then
  682. { TODO: must be taken from "p" if/when codegen makes use of multiple %fcc }
  683. condreg:=NR_FCC0
  684. else if (taicpu(p).condition in [C_EQ,C_NE]) then
  685. begin
  686. if (taicpu(p).oper[0]^.reg=NR_R0) then
  687. condreg:=taicpu(p).oper[1]^.reg
  688. else if (taicpu(p).oper[1]^.reg=NR_R0) then
  689. condreg:=taicpu(p).oper[0]^.reg
  690. end;
  691. if (condreg<>NR_NO) then
  692. begin
  693. { check for
  694. bCC xxx
  695. <several movs>
  696. xxx:
  697. }
  698. l:=0;
  699. GetNextInstruction(p, hp1);
  700. while CanBeCMOV(hp1,condreg) do // CanBeCMOV returns False for nil or labels
  701. begin
  702. inc(l);
  703. GetNextInstruction(hp1,hp1);
  704. end;
  705. if assigned(hp1) then
  706. begin
  707. if FindLabel(tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol),hp1) then
  708. begin
  709. if (l<=4) and (l>0) then
  710. begin
  711. condition:=inverse_cond(taicpu(p).condition);
  712. hp2:=p;
  713. GetNextInstruction(p,hp1);
  714. p:=hp1;
  715. repeat
  716. ChangeToCMOV(taicpu(hp1),condition,condreg);
  717. GetNextInstruction(hp1,hp1);
  718. until not CanBeCMOV(hp1,condreg);
  719. { wait with removing else GetNextInstruction could
  720. ignore the label if it was the only usage in the
  721. jump moved away }
  722. tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol).decrefs;
  723. RemoveDelaySlot(hp2);
  724. asml.remove(hp2);
  725. hp2.free;
  726. continue;
  727. end;
  728. end
  729. else
  730. begin
  731. { check further for
  732. bCC xxx
  733. <several movs 1>
  734. b yyy
  735. xxx:
  736. <several movs 2>
  737. yyy:
  738. }
  739. { hp2 points to jmp yyy }
  740. hp2:=hp1;
  741. { skip hp1 to xxx }
  742. GetNextInstruction(hp1, hp1);
  743. if assigned(hp2) and
  744. assigned(hp1) and
  745. (l<=3) and
  746. (hp2.typ=ait_instruction) and
  747. (taicpu(hp2).opcode=A_BA) and
  748. { real label and jump, no further references to the
  749. label are allowed }
  750. (tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol).getrefs<=2) and
  751. FindLabel(tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol),hp1) then
  752. begin
  753. l:=0;
  754. { skip hp1 to <several moves 2> }
  755. GetNextInstruction(hp1, hp1);
  756. while CanBeCMOV(hp1,condreg) do
  757. begin
  758. inc(l);
  759. GetNextInstruction(hp1, hp1);
  760. end;
  761. { hp1 points to yyy: }
  762. if assigned(hp1) and (l<=3) and
  763. FindLabel(tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol),hp1) then
  764. begin
  765. condition:=inverse_cond(taicpu(p).condition);
  766. GetNextInstruction(p,hp1);
  767. hp3:=p;
  768. p:=hp1;
  769. while CanBeCMOV(hp1,condreg) do
  770. begin
  771. ChangeToCMOV(taicpu(hp1),condition,condreg);
  772. GetNextInstruction(hp1,hp1);
  773. end;
  774. { hp2 is still at b yyy }
  775. GetNextInstruction(hp2,hp1);
  776. { hp2 is now at xxx: }
  777. condition:=inverse_cond(condition);
  778. GetNextInstruction(hp1,hp1);
  779. { hp1 is now at <several movs 2> }
  780. while CanBeCMOV(hp1,condreg) do
  781. begin
  782. ChangeToCMOV(taicpu(hp1),condition,condreg);
  783. GetNextInstruction(hp1,hp1);
  784. end;
  785. { remove bCC }
  786. tasmlabel(taicpu(hp3).oper[taicpu(hp3).ops-1]^.ref^.symbol).decrefs;
  787. RemoveDelaySlot(hp3);
  788. asml.remove(hp3);
  789. hp3.free;
  790. { remove jmp }
  791. tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol).decrefs;
  792. RemoveDelaySlot(hp2);
  793. asml.remove(hp2);
  794. hp2.free;
  795. continue;
  796. end;
  797. end;
  798. end;
  799. end;
  800. end;
  801. end;
  802. end;
  803. end;
  804. end;
  805. UpdateUsedRegs(p);
  806. p:=tai(p.next);
  807. end;
  808. end;
  809. begin
  810. casmoptimizer:=TCpuAsmOptimizer;
  811. end.