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aoptcpu.pas
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19c8abac0b
+ enable jump optimizer for i8086
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12 rokov pred |
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aoptcpub.pas
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19c8abac0b
+ enable jump optimizer for i8086
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12 rokov pred |
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aoptcpud.pas
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19c8abac0b
+ enable jump optimizer for i8086
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12 rokov pred |
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cgcpu.pas
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791cd932fd
+ support i8086 far data memory models in tcg8086.g_intf_wrapper
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11 rokov pred |
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cpubase.inc
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c48d572996
Implement support for saving and restoring address registers.
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12 rokov pred |
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cpuinfo.pas
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c003f934c5
* Included cs_opt_peephole into genericlevel1optimizerswitches, so it is re-enabled for all targets after r27106.
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11 rokov pred |
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cpunode.pas
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3cc8ff11e3
+ generate the stack segment for i8086 far data memory models from within fpc
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11 rokov pred |
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cpupara.pas
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3dfc6ac7e1
* fixed the passing of extended floating type parameters on i8086 for
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11 rokov pred |
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cpupi.pas
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c916105db8
- rm ti8086procinfo.allocate_got_register as it isn't used on the i8086
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12 rokov pred |
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cputarg.pas
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eff0894a66
all the extra i8086 units added
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12 rokov pred |
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hlcgcpu.pas
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24fcac9f87
+ added support for nested procvars in the i8086 far data memory models
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11 rokov pred |
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i8086att.inc
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dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
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11 rokov pred |
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i8086atts.inc
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dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
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11 rokov pred |
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i8086int.inc
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dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
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11 rokov pred |
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i8086nop.inc
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842e027a9f
+ prove of concept how FMA4 could be supported in inline assembler
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11 rokov pred |
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i8086op.inc
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dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
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11 rokov pred |
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i8086prop.inc
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dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
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11 rokov pred |
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i8086tab.inc
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842e027a9f
+ prove of concept how FMA4 could be supported in inline assembler
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11 rokov pred |
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n8086add.pas
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99c555cea8
+ implemented huge pointer subtraction
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11 rokov pred |
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n8086cal.pas
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8a606761cd
* don't push cs in ti8086callnode.extra_interrupt_code in the far code memory
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11 rokov pred |
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n8086cnv.pas
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e8b9d9bf41
* converted tcgtypeconvnode.second_nil_to_methodprocvar to the high level code
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11 rokov pred |
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n8086con.pas
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338c064beb
* moved x86-specific tpointerdef functionality to architecture-specific
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11 rokov pred |
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n8086inl.pas
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683478f00c
+ added a proper far pointer inc/dec implementation (operating only on the offset,
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11 rokov pred |
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n8086ld.pas
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f4a0c08736
* fixed nested access to parent local variables in i8086 far data memory models
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11 rokov pred |
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n8086mat.pas
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dc432918da
+ enabled the use of the DIV/IDIV instruction for 16-bit div/mod on i8086
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11 rokov pred |
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n8086mem.pas
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38aec68d6f
* ti8086vecnode.update_reference_reg_mul: remove the segment before calling
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11 rokov pred |
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n8086tcon.pas
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4832682c58
* fixed i8086 far pointer typed constants that are initialized with nil
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11 rokov pred |
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n8086util.pas
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1910177cf0
+ added heapmax support to the $M directive on i8086-msdos. It is currently
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11 rokov pred |
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r8086ari.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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r8086att.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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r8086con.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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r8086dwrf.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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r8086int.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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r8086iri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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r8086nasm.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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r8086nor.inc
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107a6f6552
* i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc
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12 rokov pred |
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r8086nri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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r8086num.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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r8086ot.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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r8086rni.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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r8086sri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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r8086stab.inc
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107a6f6552
* i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc
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12 rokov pred |
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r8086std.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 rokov pred |
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ra8086att.pas
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a04cbc09b0
* changed the default i8086 asmmode to Intel
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12 rokov pred |
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ra8086int.pas
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a04cbc09b0
* changed the default i8086 asmmode to Intel
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12 rokov pred |
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rgcpu.pas
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c9f8703679
+ set ref.segment to NR_SS for all temps/localvars on i8086. This allows the
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11 rokov pred |
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symcpu.pas
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d86a8ebc99
* defutil.get_int_result_type_from_pointer_subtraction moved to a virtual
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11 rokov pred |
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tgcpu.pas
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c9f8703679
+ set ref.segment to NR_SS for all temps/localvars on i8086. This allows the
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11 rokov pred |
nickysn
d86a8ebc99
* defutil.get_int_result_type_from_pointer_subtraction moved to a virtual