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aasmcpu.pas
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b91d965096
* m68k: initial support for ROL/ROR operations, defining 'cpurox' for CPU target can actually enable them. However it cannot be done outright because these instructions do not exits on Coldfire, and internal processing of RoX,Sar,BsX, etc. can not yet be switched depending on CPU subtype.
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11 anni fa |
ag68kgas.pas
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6d4a9aad66
pass new asm extra opt using -ao option
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11 anni fa |
aoptcpu.pas
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df7af34de9
m68k: very early optimizer implementation experiments
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11 anni fa |
aoptcpub.pas
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2f5ce095ce
* RefsHaveIndexReg -> cpurefshaveindexreg
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13 anni fa |
aoptcpud.pas
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790a4fe2d3
* log and id tags removed
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20 anni fa |
cgcpu.pas
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b7da785688
* m68k: support stack cleanup at caller side, fixed calculation of pushed parameters size and offsets and cleaned out another pile of junk.
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11 anni fa |
cpubase.pas
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c79cd3beca
* m68k: fixed/completed the inverse_cond function.
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11 anni fa |
cpuinfo.pas
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7093efe4c4
fixed comment, no functional changes
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11 anni fa |
cpunode.pas
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519094055c
m68k: cleaned up and fixed cgcpu/fixref for coldfire at least; also enabled n68kmem node, so addressing with scaling is generated now
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11 anni fa |
cpupara.pas
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b7da785688
* m68k: support stack cleanup at caller side, fixed calculation of pushed parameters size and offsets and cleaned out another pile of junk.
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11 anni fa |
cpupi.pas
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786e814d49
Use the correct frame pointer register: A6 on Unixes and A5 on everything else. The only
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12 anni fa |
cputarg.pas
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df7af34de9
m68k: very early optimizer implementation experiments
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11 anni fa |
hlcgcpu.pas
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72e9cfee24
* create/destroy also the high level code generator for all architectures,
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14 anni fa |
itcpugas.pas
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fe3d11118c
add string version of the new instructions to the right place. removed one more duplicate table.
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11 anni fa |
m68kreg.dat
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7ee09b9620
instead of supporting SP only, have register A7 defined, and have SP as an alias
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11 anni fa |
n68kadd.pas
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15e374f3c6
* m68k: fixed comparison of small sets, it should not modify sides. tw18013 is now correct when compiled with -O2.
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11 anni fa |
n68kcal.pas
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b7da785688
* m68k: support stack cleanup at caller side, fixed calculation of pushed parameters size and offsets and cleaned out another pile of junk.
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11 anni fa |
n68kcnv.pas
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01febdd7f3
plain 68000 also doesn't support 123(dX)
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11 anni fa |
n68kmat.pas
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0262514939
* m68k: Transform 32-bit div/mod nodes into helper calls during pass 1. This is consistent with the way other targets do it, and results in pretty much nicer code.
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11 anni fa |
n68kmem.pas
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2881bc81b1
m68k: tweaks and fixes in n68kmem. the node is still disabled, needs further fixes in cgcpu/fixref to work properly
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11 anni fa |
r68kcon.inc
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7ee09b9620
instead of supporting SP only, have register A7 defined, and have SP as an alias
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11 anni fa |
r68kgas.inc
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7ee09b9620
instead of supporting SP only, have register A7 defined, and have SP as an alias
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11 anni fa |
r68kgri.inc
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7ee09b9620
instead of supporting SP only, have register A7 defined, and have SP as an alias
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11 anni fa |
r68knor.inc
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b19572b41d
+ gas registers
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21 anni fa |
r68knum.inc
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2555cc8496
* register numbers for address registers fixed
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21 anni fa |
r68krni.inc
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b19572b41d
+ gas registers
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21 anni fa |
r68ksri.inc
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7ee09b9620
instead of supporting SP only, have register A7 defined, and have SP as an alias
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11 anni fa |
r68ksta.inc
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2555cc8496
* register numbers for address registers fixed
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21 anni fa |
r68kstd.inc
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7ee09b9620
instead of supporting SP only, have register A7 defined, and have SP as an alias
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11 anni fa |
r68ksup.inc
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7ee09b9620
instead of supporting SP only, have register A7 defined, and have SP as an alias
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11 anni fa |
ra68k.pas
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3b787b7187
m68k/ra68k.pas: fixed some multi level comment warnings, so it now compiles with warnings on
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11 anni fa |
ra68kmot.pas
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cfe13734e0
* m68k: Fixed damage caused by r27573 and r28177:
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11 anni fa |
rgcpu.pas
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b7fe6797bf
Merged revisions 2921-2922,2925 via svnmerge from
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19 anni fa |
symcpu.pas
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02495c17bd
Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym".
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11 anni fa |