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@@ -138,6 +138,10 @@ uses
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IF_NONE = $00000000;
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+ IF_EXTENSIONS = $0000000F;
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+
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+ IF_NEON = $00000001;
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+
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IF_ARMMASK = $000F0000;
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IF_ARM32 = $00010000;
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IF_THUMB = $00020000;
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@@ -861,6 +865,7 @@ implementation
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A_UXTB,A_UXTH,A_SXTB,A_SXTH,
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A_NEG,
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A_VABS,A_VADD,A_VCVT,A_VDIV,A_VLDR,A_VMOV,A_VMUL,A_VNEG,A_VSQRT,A_VSUB,
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+ A_VEOR,
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A_MRS,A_MSR:
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if opnr=0 then
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result:=operand_write
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@@ -2211,19 +2216,19 @@ implementation
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FPUMasks: array[tfputype] of longword =
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(
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- IF_NONE,
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- IF_NONE,
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- IF_NONE,
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- IF_FPA,
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- IF_FPA,
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- IF_FPA,
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- IF_VFPv2,
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- IF_VFPv2 or IF_VFPv3,
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- IF_VFPv2 or IF_VFPv3,
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- IF_VFPv2 or IF_VFPv3,
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- IF_NONE,
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- IF_VFPv2 or IF_VFPv3 or IF_VFPv4,
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- IF_VFPv2 or IF_VFPv3 or IF_VFPv4
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+ { fpu_none } IF_NONE,
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+ { fpu_soft } IF_NONE,
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+ { fpu_libgcc } IF_NONE,
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+ { fpu_fpa } IF_FPA,
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+ { fpu_fpa10 } IF_FPA,
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+ { fpu_fpa11 } IF_FPA,
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+ { fpu_vfpv2 } IF_VFPv2,
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+ { fpu_vfpv3 } IF_VFPv2 or IF_VFPv3,
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+ { fpu_neon_vfpv3 } IF_VFPv2 or IF_VFPv3 or IF_NEON,
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+ { fpu_vfpv3_d16 } IF_VFPv2 or IF_VFPv3,
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+ { fpu_fpv4_s16 } IF_NONE,
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+ { fpu_vfpv4 } IF_VFPv2 or IF_VFPv3 or IF_VFPv4,
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+ { fpu_neon_vfpv4 } IF_VFPv2 or IF_VFPv3 or IF_VFPv4 or IF_NEON
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);
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begin
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fArmVMask:=Masks[current_settings.cputype] or FPUMasks[current_settings.fputype];
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