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@@ -251,7 +251,7 @@ Implementation
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(taicpu(hp1).oper[0]^.reg = NR_R1) and
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(taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
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A_LSL,A_LSR,
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- A_OR,A_ORI,A_ROL,A_ROR])))) or
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+ A_OR,A_ORI,A_ROL,A_ROR,A_SUB,A_SBI])))) or
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(MatchInstruction(hp1, A_CPI) and
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(taicpu(p).opcode = A_ANDI) and
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(taicpu(p).oper[1]^.typ=top_const) and
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@@ -266,7 +266,9 @@ Implementation
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EQ = Z=1; NE = Z=0;
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MI = N=1; PL = N=0; }
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MatchInstruction(hp2, A_BRxx) and
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- (taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) { and
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+ ((taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) or
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+ { sub/sbc set all flags }
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+ (taicpu(p).opcode in [A_SUB,A_SBI])){ and
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no flag allocation tracking implemented yet on avr
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assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
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begin
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@@ -282,7 +284,9 @@ Implementation
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}
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// If we compare to the same value we are masking then invert the comparison
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- if (taicpu(hp1).opcode=A_CPI) then
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+ if (taicpu(hp1).opcode=A_CPI) or
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+ { sub/sbc with reverted? }
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+ ((taicpu(hp1).oper[0]^.reg = NR_R1) and (taicpu(p).opcode in [A_SUB,A_SBI])) then
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taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
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asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
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florian