* moved support for passing floating point values in integer registers from

    platform-dependent ifdef'ed code in ncgcal to generic code cgobj

git-svn-id: trunk@15316 -

compiler/cgobj.pas

@@ -2632,17 +2632,35 @@ implementation
     procedure tcg.a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
       var
          href : treference;
+         hsize: tcgsize;
       begin
-         cgpara.check_simple_location;
          case cgpara.location^.loc of
           LOC_FPUREGISTER,LOC_CFPUREGISTER:
-            a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
+            begin
+              cgpara.check_simple_location;
+              a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
+            end;
           LOC_REFERENCE,LOC_CREFERENCE:
             begin
+              cgpara.check_simple_location;
               reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
               { concatcopy should choose the best way to copy the data }
               g_concatcopy(list,ref,href,tcgsize2size[size]);
             end;
+          LOC_REGISTER,LOC_CREGISTER:
+            begin
+              { force integer size }
+              hsize:=int_cgsize(tcgsize2size[size]);
+{$ifndef cpu64bitalu}
+              if (hsize in [OS_S64,OS_64]) then
+                cg64.a_load64_ref_cgpara(list,ref,cgpara)
+              else
+{$endif not cpu64bitalu}
+                begin
+                  cgpara.check_simple_location;
+                  a_load_ref_cgpara(list,hsize,ref,cgpara)
+                end;
+            end
           else
             internalerror(200402201);
         end;

compiler/ncgcal.pas

@@ -216,36 +216,9 @@ implementation
                      location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
                      cg.a_loadmm_reg_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.register,tempcgpara,mms_movescalar);
                    end;
-{$ifdef cpu64bitalu}
-                 LOC_REGISTER,
-                 LOC_CREGISTER :
-                   begin
-                     location_force_mem(current_asmdata.CurrAsmList,left.location);
-                     { force integer size }
-                     left.location.size:=int_cgsize(tcgsize2size[left.location.size]);
-                     cg.a_load_ref_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara);
-                   end;
-{$endif cpu64bitalu}
-{$ifdef powerpc}
-                 LOC_REGISTER,
-                 LOC_CREGISTER :
-                   begin
-                     { aix abi passes floats of varargs in both fpu and }
-                     { integer registers                                }
-                     location_force_mem(current_asmdata.CurrAsmList,left.location);
-                     { force integer size }
-                     left.location.size:=int_cgsize(tcgsize2size[left.location.size]);
-                     if (left.location.size in [OS_32,OS_S32]) then
-                       cg.a_load_ref_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara)
-                     else
-                       cg64.a_load64_ref_cgpara(current_asmdata.CurrAsmList,left.location.reference,tempcgpara);
-                   end;
-{$endif powerpc}
-{$if defined(sparc) or defined(arm) or defined(m68k)}
-                 { sparc and arm pass floats in normal registers }
+                 { Some targets pass floats in normal registers }
                  LOC_REGISTER,
                  LOC_CREGISTER,
-{$endif sparc}
                  LOC_REFERENCE,
                  LOC_CREFERENCE,
                  LOC_FPUREGISTER,