* split cpu64bit compiler define into

    a) cpu64bitaddr, which means that we are generating a compiler which
       will generate code for targets with a 64 bit address space/abi
    b) cpu64bitalu, which means that we are generating a compiler which
       will generate code for a cpu with support for 64 bit integer
       operations (possibly running in a 32 bit address space, depending
       on the cpu64bitaddr define)
   All cpus which had cpu64bit set now have both the above defines set,
   and none of the 32 bit cpus have cpu64bitalu set (and none will
   compile with it currently)
  + pint and puint types, similar to aint/aword (not pword because that
    that conflicts with pword=^word)
  * several changes from aint/aword to pint/pword
  * some changes of tcgsize2size[OS_INT] to sizeof(pint)

git-svn-id: trunk@10320 -

compiler/README

@@ -48,7 +48,12 @@ Possible compiler switches (* marks a currently required switch):
   cpuflags            The target processor has status flags (on by default)
   cpufpemu            The target compiler will also support emitting software
                        floating point operations
-  cpu64bit            The target is a 64-bit processor
+  cpu64bitaddr        The targets use a 64-bit address space (pointers and
+                       the default integer type are 64 bit)
+  cpu64bitalu         The target cpu has 64-bit registers available (unless
+                       cpu64bitaddr is also defined, pointers and default
+                       integer type remain 32 bit, but the cpu can perform
+                       64 bit calculations directly without needing helpers)
   -----------------------------------------------------------------
 
   Required switches for a i386 compiler be compiled by Free Pascal Compiler:

compiler/aasmtai.pas

@@ -115,13 +115,17 @@ interface
         );
 
     const
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
+       aitconst_ptr = aitconst_64bit;
+{$else cpu64bitaddr}
+       aitconst_ptr = aitconst_32bit;
+{$endif cpu64bitaddr}
+
+{$ifdef cpu64bitalu}
        aitconst_aint = aitconst_64bit;
-       aitconst_ptr  = aitconst_64bit;
-{$else cpu64bit}
+{$else cpu64bitaddr}
        aitconst_aint = aitconst_32bit;
-       aitconst_ptr  = aitconst_32bit;
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
 
        taitypestr : array[taitype] of string[24] = (
           '<none>',
@@ -407,6 +411,7 @@ interface
           constructor Create_sleb128bit(_value : int64);
           constructor Create_uleb128bit(_value : qword);
           constructor Create_aint(_value : aint);
+          constructor Create_pint(_value : pint);
           constructor Create_sym(_sym:tasmsymbol);
           constructor Create_type_sym(_typ:taiconst_type;_sym:tasmsymbol);
           constructor Create_sym_offset(_sym:tasmsymbol;ofs:aint);
@@ -1141,6 +1146,17 @@ implementation
       end;
 
 
+    constructor tai_const.Create_pint(_value : pint);
+      begin
+         inherited Create;
+         typ:=ait_const;
+         consttype:=aitconst_ptr;
+         value:=_value;
+         sym:=nil;
+         endsym:=nil;
+      end;
+
+
     constructor tai_const.Create_type_sym(_typ:taiconst_type;_sym:tasmsymbol);
       begin
          inherited Create;
@@ -1260,7 +1276,7 @@ implementation
             if target_info.system=system_x86_64_win64 then
               result:=sizeof(longint)
             else
-              result:=sizeof(aint);
+              result:=sizeof(pint);
           aitconst_uleb128bit :
             result:=LengthUleb128(qword(value));
           aitconst_sleb128bit :

compiler/aggas.pas

@@ -658,7 +658,7 @@ implementation
              begin
                constdef:=tai_const(hp).consttype;
                case constdef of
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
                  aitconst_128bit :
                     begin
                       internalerror(200404291);
@@ -683,13 +683,13 @@ implementation
                         end;
                       AsmLn;
                     end;
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                  aitconst_uleb128bit,
                  aitconst_sleb128bit,
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
                  aitconst_128bit,
                  aitconst_64bit,
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                  aitconst_32bit,
                  aitconst_16bit,
                  aitconst_8bit,

compiler/arm/aasmcpu.pas

@@ -768,7 +768,7 @@ implementation
         prolog: TAsmList;
       begin
         prolog:=TAsmList.create;
-        new_section(prolog,sec_code,'FPC_EH_PROLOG',sizeof(aint),secorder_begin);
+        new_section(prolog,sec_code,'FPC_EH_PROLOG',sizeof(pint),secorder_begin);
         prolog.concat(Tai_const.Createname('_ARM_ExceptionHandler', 0));
         prolog.concat(Tai_const.Create_32bit(0));
         prolog.concat(Tai_symbol.Createname_global('FPC_EH_CODE_START',AT_DATA,0));
@@ -776,7 +776,7 @@ implementation
         prolog.concat(taicpu.op_reg_reg(A_MOV,NR_R15,NR_R14));
         current_asmdata.asmlists[al_start].insertList(prolog);
         prolog.Free;
-        new_section(current_asmdata.asmlists[al_end],sec_pdata,'',sizeof(aint));
+        new_section(current_asmdata.asmlists[al_end],sec_pdata,'',sizeof(pint));
         current_asmdata.asmlists[al_end].concat(Tai_const.Createname('FPC_EH_CODE_START', 0));
         current_asmdata.asmlists[al_end].concat(Tai_const.Create_32bit(longint($ffffff01)));
       end;

compiler/arm/cpupara.pas

@@ -75,8 +75,8 @@ unit cpupara;
         if nr<1 then
           internalerror(2002070801);
         cgpara.reset;
-        cgpara.size:=OS_INT;
-        cgpara.intsize:=tcgsize2size[OS_INT];
+        cgpara.size:=OS_ADDR;
+        cgpara.intsize:=sizeof(pint);
         cgpara.alignment:=std_param_align;
         paraloc:=cgpara.add_location;
         with paraloc^ do

compiler/assemble.pas

@@ -1177,7 +1177,7 @@ Implementation
                        if target_info.system=system_x86_64_win64 then
                          ObjData.writereloc(Tai_const(hp).symofs,sizeof(longint),Objdata.SymbolRef(tai_const(hp).sym),RELOC_RVA)
                        else
-                         ObjData.writereloc(Tai_const(hp).symofs,sizeof(aint),Objdata.SymbolRef(tai_const(hp).sym),RELOC_RVA);
+                         ObjData.writereloc(Tai_const(hp).symofs,sizeof(pint),Objdata.SymbolRef(tai_const(hp).sym),RELOC_RVA);
                      end;
                    aitconst_secrel32_symbol :
                      begin

compiler/cgbase.pas

@@ -191,13 +191,13 @@ interface
       end;
 
       { A type to store register locations for 64 Bit values. }
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
       tregister64 = tregister;
-{$else cpu64bit}
+{$else cpu64bitalu}
       tregister64 = record
          reglo,reghi : tregister;
       end;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
 
       Tregistermmxset = record
         reg0,reg1,reg2,reg3:Tregister

compiler/cgobj.pas

@@ -498,7 +498,7 @@ unit cgobj;
           function get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
        end;
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
     {# @abstract(Abstract code generator for 64 Bit operations)
        This class implements an abstract code generator class
        for 64 Bit operations.
@@ -572,15 +572,15 @@ unit cgobj;
         { override to catch 64bit rangechecks }
         procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
     end;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
 
     var
        {# Main code generator class }
        cg : tcg;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
        {# Code generator class for all operations working with 64-Bit operands }
        cg64 : tcg64;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
 
 
 implementation
@@ -1290,7 +1290,7 @@ implementation
             if (loadbitsize = AIntBits) then
               begin
                 { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
-                a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpreg);
+                a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bitalu}6{$else}5{$endif},tmpreg);
                 { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
                 a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
                 { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
@@ -1316,7 +1316,7 @@ implementation
             if (loadbitsize = AIntBits) then
               begin
                 { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
-                a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpreg);
+                a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bitalu}6{$else}5{$endif},tmpreg);
                 { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
                 a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
                 { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
@@ -1695,7 +1695,7 @@ implementation
                         if (loadbitsize = AIntBits) then
                           begin
                             { if (tmpindexreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
-                            a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpindexreg,valuereg);
+                            a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bitalu}6{$else}5{$endif},tmpindexreg,valuereg);
                             { if (tmpindexreg = cpu_bit_size) then maskreg := 0 else maskreg := -1 }
                             a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
                             { if (tmpindexreg = cpu_bit_size) then maskreg := 0 }
@@ -1718,7 +1718,7 @@ implementation
                           begin
                             valuereg := getintregister(list,OS_INT);
                             { if (tmpindexreg >= cpu_bit_size) then valuereg := 1 else valuereg := 0 }
-                            a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpindexreg,valuereg);
+                            a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bitalu}6{$else}5{$endif},tmpindexreg,valuereg);
                             { if (tmpindexreg = cpu_bit_size) then valuereg := 0 else valuereg := -1 }
                             a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
                             { if (tmpindexreg = cpu_bit_size) then tmpreg := maskreg := 0 }
@@ -3281,14 +3281,14 @@ implementation
            { all values are always valid                      }
            is_cbool(todef) then
           exit;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
         { handle 64bit rangechecks separate for 32bit processors }
         if is_64bit(fromdef) or is_64bit(todef) then
           begin
              cg64.g_rangecheck64(list,l,fromdef,todef);
              exit;
           end;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
         { only check when assigning to scalar, subranges are different, }
         { when todef=fromdef then the check is always generated         }
         getrange(fromdef,lfrom,hfrom);
@@ -3304,7 +3304,7 @@ implementation
         { operations can at most cause overflows (JM)                        }
         { Note that these checks are mostly processor independent, they only }
         { have to be changed once we introduce 64bit subrange types          }
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
         if (fromdef = todef) and
            (fromdef.typ=orddef) and
            (((((torddef(fromdef).ordtype = s64bit) and
@@ -3317,7 +3317,7 @@ implementation
                (lfrom = low(int64)) and
                (hfrom = high(int64)))))) then
           exit;
-{$else cpu64bit}
+{$else cpu64bitalu}
         if (fromdef = todef) and
            (fromdef.typ=orddef) and
            (((((torddef(fromdef).ordtype = s32bit) and
@@ -3327,7 +3327,7 @@ implementation
                (lfrom = low(cardinal)) and
                (hfrom = high(cardinal)))))) then
           exit;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
 
         { optimize some range checks away in safe cases }
         fromsize := fromdef.size;
@@ -3430,11 +3430,11 @@ implementation
           a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
         else
         }
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
         if qword(hto-lto)>qword(aintmax) then
           a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
         else
-{$endif cpu64bit}
+{$endif cpu64bitalu}
           a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(int64(hto-lto)),hreg,neglabel);
         a_call_name(list,'FPC_RANGEERROR');
         a_label(list,neglabel);
@@ -3798,11 +3798,11 @@ implementation
                   l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_LOCAL,AT_DATA);
                   current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
                   current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)));
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
                   current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
-{$else cpu64bit}
+{$else cpu64bitaddr}
                   current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                 end;
               result := getaddressregister(list);
               reference_reset_symbol(ref,l,0);
@@ -3821,7 +3821,7 @@ implementation
                                     TCG64
 *****************************************************************************}
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
     procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
       begin
         a_load64_reg_reg(list,regsrc,regdst);
@@ -3946,7 +3946,7 @@ implementation
         end;
       end;
 
-{$endif cpu64bit}
+{$endif cpu64bitalu}
 
 
 
@@ -3954,7 +3954,7 @@ initialization
     ;
 finalization
   cg.free;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
   cg64.free;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
 end.

compiler/cgutils.pas

@@ -105,10 +105,10 @@ unit cgutils;
                      registeralias : tregister;
 {$endif m68k}
                     );
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                 { overlay a 64 Bit register type }
                 2 : (register64 : tregister64);
-{$endif cpu64bit}
+{$endif cpu64bitalu}
               );
             LOC_SUBSETREG,
             LOC_CSUBSETREG : (

compiler/cresstr.pas

@@ -139,9 +139,9 @@ uses
               current_asmdata.asmlists[al_const].concat(tai_label.create(referencelab));
             end;
           current_asmdata.getdatalabel(result);
-          current_asmdata.asmlists[al_const].concat(tai_align.create(const_align(sizeof(aint))));
-          current_asmdata.asmlists[al_const].concat(tai_const.create_aint(-1));
-          current_asmdata.asmlists[al_const].concat(tai_const.create_aint(len));
+          current_asmdata.asmlists[al_const].concat(tai_align.create(const_align(sizeof(pint))));
+          current_asmdata.asmlists[al_const].concat(tai_const.create_pint(-1));
+          current_asmdata.asmlists[al_const].concat(tai_const.create_pint(len));
           current_asmdata.asmlists[al_const].concat(tai_label.create(result));
           if (target_info.system in systems_darwin) then
              current_asmdata.asmlists[al_const].concat(tai_directive.create(asd_reference,referencelab.name));
@@ -163,7 +163,7 @@ uses
 	  the data sections }
         maybe_new_object_file(current_asmdata.asmlists[al_const]);
         maybe_new_object_file(current_asmdata.asmlists[al_resourcestrings]);
-        new_section(current_asmdata.asmlists[al_resourcestrings],sec_data,make_mangledname('RESSTR',current_module.localsymtable,'1_START'),sizeof(aint));
+        new_section(current_asmdata.asmlists[al_resourcestrings],sec_data,make_mangledname('RESSTR',current_module.localsymtable,'1_START'),sizeof(pint));
         current_asmdata.AsmLists[al_resourcestrings].concat(tai_symbol.createname_global(
           make_mangledname('RESSTR',current_module.localsymtable,'START'),AT_DATA,0));
 
@@ -173,15 +173,15 @@ uses
         current_asmdata.asmlists[al_resourcestrings].concat(tai_const.create_sym(nil));
         current_asmdata.asmlists[al_resourcestrings].concat(tai_const.create_sym(nil));
         current_asmdata.asmlists[al_resourcestrings].concat(tai_const.create_32bit(0));
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
         current_asmdata.asmlists[al_resourcestrings].concat(tai_const.create_32bit(0));
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
 
         { Add entries }
         R:=TResourceStringItem(List.First);
         while assigned(R) do
           begin
-            new_section(current_asmdata.asmlists[al_const],sec_rodata,make_mangledname('RESSTR',current_module.localsymtable,'d_'+r.name),sizeof(aint));
+            new_section(current_asmdata.asmlists[al_const],sec_rodata,make_mangledname('RESSTR',current_module.localsymtable,'d_'+r.name),sizeof(pint));
             { Write default value }
             if assigned(R.value) and (R.len<>0) then
               valuelab:=WriteValueString(R.Value,R.Len)
@@ -199,20 +199,20 @@ uses
                      HashValue    : LongWord;
                    end;
             }
-            new_section(current_asmdata.asmlists[al_resourcestrings],sec_data,make_mangledname('RESSTR',current_module.localsymtable,'2_'+r.name),sizeof(aint));
+            new_section(current_asmdata.asmlists[al_resourcestrings],sec_data,make_mangledname('RESSTR',current_module.localsymtable,'2_'+r.name),sizeof(pint));
             resstrlab:=current_asmdata.DefineAsmSymbol(make_mangledname('RESSTR',R.Sym.owner,R.Sym.name),AB_GLOBAL,AT_DATA);
             current_asmdata.asmlists[al_resourcestrings].concat(tai_symbol.Create_global(resstrlab,0));
             current_asmdata.asmlists[al_resourcestrings].concat(tai_const.create_sym(namelab));
             current_asmdata.asmlists[al_resourcestrings].concat(tai_const.create_sym(valuelab));
             current_asmdata.asmlists[al_resourcestrings].concat(tai_const.create_sym(valuelab));
             current_asmdata.asmlists[al_resourcestrings].concat(tai_const.create_32bit(longint(R.Hash)));
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
             current_asmdata.asmlists[al_resourcestrings].concat(tai_const.create_32bit(0));
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
             current_asmdata.asmlists[al_resourcestrings].concat(tai_symbol_end.create(resstrlab));
             R:=TResourceStringItem(R.Next);
           end;
-        new_section(current_asmdata.asmlists[al_resourcestrings],sec_data,make_mangledname('RESSTR',current_module.localsymtable,'3_END'),sizeof(aint));
+        new_section(current_asmdata.asmlists[al_resourcestrings],sec_data,make_mangledname('RESSTR',current_module.localsymtable,'3_END'),sizeof(pint));
         current_asmdata.AsmLists[al_resourcestrings].concat(tai_symbol.createname_global(
           make_mangledname('RESSTR',current_module.localsymtable,'END'),AT_DATA,0));
         { The darwin/ppc64 assembler or linker seems to have trouble       }

compiler/cutils.pas

@@ -255,7 +255,7 @@ implementation
            { always starts at a multiple of 10 bits. Same for the others.  }
            3,5,6,7,9,10,12,16:
              result := 2;
-  {$ifdef cpu64bit}
+  {$ifdef cpu64bitalu}
            { performance penalty for unaligned 8 byte access is much   }
            { higher than for unaligned 4 byte access, at least on ppc, }
            { so use 4 bytes even in some cases where a value could     }
@@ -265,10 +265,10 @@ implementation
              result := 4;
            else
              result := 8;
-  {$else cpu64bit}
+  {$else cpu64bitalu}
            else
              result := 4;
-  {$endif cpu64bit}
+  {$endif cpu64bitalu}
          end;
       end;
 

compiler/dbgdwarf.pas

@@ -1353,7 +1353,7 @@ implementation
             current_asmdata.getaddrlabel(arr);
           append_entry(DW_TAG_structure_type,true,[
             DW_AT_name,DW_FORM_string,name+#0,
-            DW_AT_byte_size,DW_FORM_data1,2*sizeof(aint)
+            DW_AT_byte_size,DW_FORM_data1,2*sizeof(pint)
             ]);
           finish_entry;
 
@@ -1404,11 +1404,11 @@ implementation
             end;
           st_longstring:
             begin
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
               addnormalstringdef('LongString',u64inttype,qword(-1));
-{$else cpu64bit}
+{$else cpu64bitaddr}
               addnormalstringdef('LongString',u32inttype,cardinal(-1));
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
            end;
          st_ansistring:
            begin
@@ -1472,7 +1472,7 @@ implementation
             else
               current_asmdata.getaddrlabel(proc);
             append_entry(DW_TAG_structure_type,true,[
-              DW_AT_byte_size,DW_FORM_data1,2*sizeof(aint)
+              DW_AT_byte_size,DW_FORM_data1,2*sizeof(pint)
             ]);
             finish_entry;
 
@@ -1489,10 +1489,10 @@ implementation
             { self entry }
             append_entry(DW_TAG_member,false,[
               DW_AT_name,DW_FORM_string,'Self'#0,
-              DW_AT_data_member_location,DW_FORM_block1,1+lengthuleb128(sizeof(aint))
+              DW_AT_data_member_location,DW_FORM_block1,1+lengthuleb128(sizeof(pint))
               ]);
             current_asmdata.asmlists[al_dwarf_info].concat(tai_const.create_8bit(ord(DW_OP_plus_uconst)));
-            current_asmdata.asmlists[al_dwarf_info].concat(tai_const.create_uleb128bit(sizeof(aint)));
+            current_asmdata.asmlists[al_dwarf_info].concat(tai_const.create_uleb128bit(sizeof(pint)));
             append_labelentry_ref(DW_AT_type,def_dwarf_lab(class_tobject));
             finish_entry;
 
@@ -1718,7 +1718,7 @@ implementation
                       begin
                         templist.concat(tai_const.create_8bit(3));
                         templist.concat(tai_const.createname(sym.mangledname,0));
-                        blocksize:=1+sizeof(aword);
+                        blocksize:=1+sizeof(puint);
                       end;
                   end;
                 paravarsym,
@@ -1851,7 +1851,7 @@ implementation
             { possible, i.e., equivalent to gcc's                    }
             { __attribute__((__packed__)), which is also what gpc    }
             { does.                                                  }
-            fieldnatsize:=max(sizeof(aint),sym.vardef.size);
+            fieldnatsize:=max(sizeof(pint),sym.vardef.size);
             fieldoffset:=(sym.fieldoffset div (fieldnatsize*8)) * fieldnatsize;
             bitoffset:=sym.fieldoffset mod (fieldnatsize*8);
             if (target_info.endian=endian_little) then
@@ -1909,23 +1909,23 @@ implementation
             end;
           constnil:
             begin
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
               current_asmdata.asmlists[al_dwarf_abbrev].concat(tai_const.create_uleb128bit(ord(DW_FORM_data8)));
               current_asmdata.asmlists[al_dwarf_info].concat(tai_const.create_64bit(0));
-{$else cpu64bit}
+{$else cpu64bitaddr}
               current_asmdata.asmlists[al_dwarf_abbrev].concat(tai_const.create_uleb128bit(ord(DW_FORM_data4)));
               current_asmdata.asmlists[al_dwarf_info].concat(tai_const.create_32bit(0));
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
             end;
           constpointer:
             begin
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
               current_asmdata.asmlists[al_dwarf_abbrev].concat(tai_const.create_uleb128bit(ord(DW_FORM_data8)));
               current_asmdata.asmlists[al_dwarf_info].concat(tai_const.create_64bit(int64(sym.value.valueordptr)));
-{$else cpu64bit}
+{$else cpu64bitaddr}
               current_asmdata.asmlists[al_dwarf_abbrev].concat(tai_const.create_uleb128bit(ord(DW_FORM_data4)));
               current_asmdata.asmlists[al_dwarf_info].concat(tai_const.create_32bit(sym.value.valueordptr));
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
             end;
           constreal:
             begin
@@ -2011,14 +2011,14 @@ implementation
                  end;
                *)
                templist.concat(tai_const.create_8bit(3));
-               templist.concat(tai_const.create_aint(sym.addroffset));
-               blocksize:=1+sizeof(aword);
+               templist.concat(tai_const.create_pint(sym.addroffset));
+               blocksize:=1+sizeof(puint);
             end;
           toasm :
             begin
               templist.concat(tai_const.create_8bit(3));
               templist.concat(tai_const.createname(sym.mangledname,0));
-              blocksize:=1+sizeof(aword);
+              blocksize:=1+sizeof(puint);
             end;
           tovar:
             begin
@@ -2312,7 +2312,7 @@ implementation
             current_asmdata.RefAsmSymbol(target_asm.labelprefix+'debug_abbrev0')));
 
         { address size }
-        current_asmdata.asmlists[al_dwarf_info].concat(tai_const.create_8bit(sizeof(aint)));
+        current_asmdata.asmlists[al_dwarf_info].concat(tai_const.create_8bit(sizeof(pint)));
 
         { first manadatory compilation unit TAG }
         append_entry(DW_TAG_compile_unit,true,[
@@ -2494,7 +2494,7 @@ implementation
                        (target_info.system in systems_darwin) then
                       begin
                         asmline.concat(tai_const.create_8bit(DW_LNS_extended_op));
-                        asmline.concat(tai_const.create_uleb128bit(1+sizeof(aint)));
+                        asmline.concat(tai_const.create_uleb128bit(1+sizeof(pint)));
                         asmline.concat(tai_const.create_8bit(DW_LNE_set_address));
                         asmline.concat(tai_const.create_sym(currlabel));
                       end
@@ -2546,7 +2546,7 @@ implementation
             current_asmdata.getlabel(currlabel, alt_dbgline);
             list.insertafter(tai_label.create(currlabel), hpend);
             asmline.concat(tai_const.create_8bit(DW_LNS_extended_op));
-            asmline.concat(tai_const.create_uleb128bit(1+sizeof(aint)));
+            asmline.concat(tai_const.create_uleb128bit(1+sizeof(pint)));
             asmline.concat(tai_const.create_8bit(DW_LNE_set_address));
             asmline.concat(tai_const.create_sym(currlabel));
           end;
@@ -2580,7 +2580,7 @@ implementation
         asmline.concat(tai_const.create_uleb128bit(get_file_index(infile)));
 
         asmline.concat(tai_const.create_8bit(DW_LNS_extended_op));
-        asmline.concat(tai_const.create_uleb128bit(1+sizeof(aint)));
+        asmline.concat(tai_const.create_uleb128bit(1+sizeof(pint)));
         asmline.concat(tai_const.create_8bit(DW_LNE_set_address));
         asmline.concat(tai_const.create_sym(nil));
         asmline.concat(tai_const.create_8bit(DW_LNS_extended_op));

compiler/dbgstabs.pas

@@ -661,20 +661,20 @@ implementation
       var
         ss : ansistring;
       begin
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
         ss:=def_stabstr_evaluate(def,'s${savesize}HANDLE:$1,0,32;MODE:$1,32,32;RECSIZE:$2,64,64;'+
                                  '_PRIVATE:ar$1;1;64;$3,128,256;USERDATA:ar$1;1;16;$3,384,128;'+
                                  'NAME:ar$1;0;255;$4,512,2048;;',[def_stab_number(s32inttype),
                                  def_stab_number(s64inttype),
                                  def_stab_number(u8inttype),
                                  def_stab_number(cchartype)]);
-{$else cpu64bit}
+{$else cpu64bitaddr}
         ss:=def_stabstr_evaluate(def,'s${savesize}HANDLE:$1,0,32;MODE:$1,32,32;RECSIZE:$1,64,32;'+
                                  '_PRIVATE:ar$1;1;32;$3,96,256;USERDATA:ar$1;1;16;$2,352,128;'+
                                  'NAME:ar$1;0;255;$3,480,2048;;',[def_stab_number(s32inttype),
                                  def_stab_number(u8inttype),
                                  def_stab_number(cchartype)]);
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
         write_def_stabstr(list,def,ss);
       end;
 
@@ -862,9 +862,9 @@ implementation
           filedef :
             begin
               appenddef(list,s32inttype);
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
               appenddef(list,s64inttype);
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
               appenddef(list,u8inttype);
               appenddef(list,cchartype);
             end;
@@ -1173,7 +1173,7 @@ implementation
           else
             begin
               if (vo_is_thread_var in sym.varoptions) then
-                threadvaroffset:='+'+tostr(sizeof(aint))
+                threadvaroffset:='+'+tostr(sizeof(pint))
               else
                 threadvaroffset:='';
               if (vo_is_typed_const in sym.varoptions) then

compiler/defutil.pas

@@ -927,9 +927,9 @@ implementation
             begin
               if tprocvardef(def).is_methodpointer and
                  (not tprocvardef(def).is_addressonly) then
-                if (sizeof(aint) = 4) then
+                if (sizeof(pint) = 4) then
                   result:=OS_64
-                else if (sizeof(aint) = 8) then
+                else if (sizeof(pint) = 8) then
                   result:=OS_128
                 else
                   internalerror(200707141)

compiler/fpcdefs.inc

@@ -60,7 +60,8 @@
 {$ifdef x86_64}
   {$define x86}
   {$define cpuflags}
-  {$define cpu64bit}
+  {$define cpu64bitalu}
+  {$define cpu64bitaddr}
   {$define cpuextended}
   {$define cpufloat128}
   {$define cputargethasfixedstack}
@@ -69,7 +70,8 @@
 {$endif x86_64}
 
 {$ifdef alpha}
-  {$define cpu64bit}
+  {$define cpu64bitalu}
+  {$define cpu64bitaddr}
 {$endif alpha}
 
 {$ifdef sparc}
@@ -86,7 +88,8 @@
 {$endif powerpc}
 
 {$ifdef powerpc64}
-  {$define cpu64bit}
+  {$define cpu64bitalu}
+  {$define cpu64bitaddr}
   {$define cpuflags}
   {$define cputargethasfixedstack}
   {$define cpumm}

compiler/globtype.pas

@@ -34,20 +34,30 @@ interface
        TCmdStr = AnsiString;
        TPathStr = String;
 
+       { Integer type corresponding to pointer size }
+{$ifdef cpu64bitaddr}
+       PUint = qword;
+       PInt = int64;
+{$else cpu64bitaddr}
+       PUint = cardinal;
+       PInt = longint;
+{$endif cpu64bitaddr}     
+
        { Natural integer register type and size for the target machine }
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
        AWord = qword;
        AInt = Int64;
 
      Const
        AIntBits = 64;
-{$else cpu64bit}
+{$else cpu64bitalu}
        AWord = longword;
        AInt = longint;
 
      Const
        AIntBits = 32;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
+
      Type
        PAWord = ^AWord;
        PAInt = ^AInt;

compiler/i386/cpupara.pas

@@ -268,8 +268,8 @@ unit cpupara;
         paraloc : pcgparalocation;
       begin
         cgpara.reset;
-        cgpara.size:=OS_INT;
-        cgpara.intsize:=tcgsize2size[OS_INT];
+        cgpara.size:=OS_ADDR;
+        cgpara.intsize:=sizeof(pint);
         cgpara.alignment:=get_para_align(calloption);
         paraloc:=cgpara.add_location;
         with paraloc^ do

compiler/nadd.pas

@@ -1142,7 +1142,7 @@ implementation
                    inserttypeconv(right,u64inttype);
                end
              { 64 bit cpus do calculations always in 64 bit }
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
              { is there a cardinal? }
              else if ((torddef(rd).ordtype=u32bit) or (torddef(ld).ordtype=u32bit)) then
                begin
@@ -1186,7 +1186,7 @@ implementation
                        inserttypeconv(right,u32inttype);
                    end;
                end
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
              { generic ord conversion is sinttype }
              else
                begin
@@ -2445,7 +2445,7 @@ implementation
                   internalerror(200103291);
                  expectloc:=LOC_FLAGS;
                end
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
               { is there a 64 bit type ? }
              else if (torddef(ld).ordtype in [s64bit,u64bit,scurrency]) then
                begin
@@ -2457,7 +2457,7 @@ implementation
                   else
                     expectloc:=LOC_JUMP;
                end
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
              { is there a cardinal? }
              else if (torddef(ld).ordtype=u32bit) then
                begin

compiler/ncgadd.pas

@@ -177,7 +177,7 @@ interface
           begin
             if TCGSize2Size[left.location.size]<>TCGSize2Size[location.size] then
               internalerror(200307041);
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
             if location.size in [OS_64,OS_S64] then
               begin
                 location.register64.reglo := left.location.register64.reglo;
@@ -192,7 +192,7 @@ interface
           begin
             if TCGSize2Size[right.location.size]<>TCGSize2Size[location.size] then
               internalerror(200307042);
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
             if location.size in [OS_64,OS_S64] then
               begin
                 location.register64.reglo := right.location.register64.reglo;
@@ -205,7 +205,7 @@ interface
         else
 {$endif}
           begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
             if location.size in [OS_64,OS_S64] then
               begin
                 location.register64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
@@ -546,7 +546,7 @@ interface
           (left.resultdef.typ<>pointerdef) and
           (right.resultdef.typ<>pointerdef);
 
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
         case nodetype of
           xorn,orn,andn,addn:
             begin
@@ -587,7 +587,7 @@ interface
           else
             internalerror(2002072803);
         end;
-{$else cpu64bit}
+{$else cpu64bitalu}
         case nodetype of
           xorn,orn,andn,addn:
             begin
@@ -633,7 +633,7 @@ interface
           else
             internalerror(2002072803);
         end;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
 
         { emit overflow check if enabled }
         if checkoverflow then

compiler/ncgbas.pas

@@ -415,14 +415,14 @@ interface
                   location_reset(tempinfo^.location,LOC_CREGISTER,def_cgsize(tempinfo^.typedef))
                 else
                   location_reset(tempinfo^.location,LOC_REGISTER,def_cgsize(tempinfo^.typedef));
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                 if tempinfo^.location.size in [OS_64,OS_S64] then
                   begin
                     tempinfo^.location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
                     tempinfo^.location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
                   end
                 else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                   tempinfo^.location.register:=cg.getintregister(current_asmdata.CurrAsmList,tempinfo^.location.size);
               end;
           end
@@ -504,14 +504,14 @@ interface
                 begin
                   { make sure the register allocator doesn't reuse the }
                   { register e.g. in the middle of a loop              }
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                   if tempinfo^.location.size in [OS_64,OS_S64] then
                     begin
                       cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register64.reghi);
                       cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register64.reglo);
                     end
                   else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                     cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register);
                 end;
               if release_to_normal then

compiler/ncgcal.pas

@@ -218,7 +218,7 @@ implementation
                      location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
                      cg.a_parammm_reg(current_asmdata.CurrAsmList,left.location.size,left.location.register,tempcgpara,mms_movescalar);
                    end;
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
                  LOC_REGISTER,
                  LOC_CREGISTER :
                    begin
@@ -227,7 +227,7 @@ implementation
                      left.location.size:=int_cgsize(tcgsize2size[left.location.size]);
                      cg.a_param_ref(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara);
                    end;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
 {$ifdef powerpc}
                  LOC_REGISTER,
                  LOC_CREGISTER :
@@ -262,7 +262,7 @@ implementation
                  LOC_MMREGISTER,
                  LOC_CMMREGISTER:
                    cg.a_parammm_ref(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara,mms_movescalar);
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
                  LOC_REGISTER,
                  LOC_CREGISTER :
                    begin
@@ -270,7 +270,7 @@ implementation
                      left.location.size:=int_cgsize(tcgsize2size[left.location.size]);
                      cg.a_param_ref(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara);
                    end;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
 {$ifdef powerpc}
                  { x86_64 pushes s64comp in normal register }
                  LOC_REGISTER,
@@ -300,21 +300,21 @@ implementation
              LOC_REGISTER,
              LOC_CREGISTER :
                begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                  { use cg64 only for int64, not for 8 byte records }
                  if is_64bit(left.resultdef) then
                    cg64.a_param64_loc(current_asmdata.CurrAsmList,left.location,tempcgpara)
                  else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                    begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                      { Only a_param_ref supports multiple locations, when the
                        value is still a const or in a register then write it
                        to a reference first. This situation can be triggered
                        by typecasting an int64 constant to a record of 8 bytes }
                      if left.location.size in [OS_64,OS_S64] then
                        location_force_mem(current_asmdata.CurrAsmList,left.location);
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                      cg.a_param_loc(current_asmdata.CurrAsmList,left.location,tempcgpara);
                    end;
                end;
@@ -332,21 +332,21 @@ implementation
              LOC_REFERENCE,
              LOC_CREFERENCE :
                begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                  { use cg64 only for int64, not for 8 byte records }
                  if is_64bit(left.resultdef) then
                    cg64.a_param64_loc(current_asmdata.CurrAsmList,left.location,tempcgpara)
                  else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                    begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                      { Only a_param_ref supports multiple locations, when the
                        value is still a const or in a register then write it
                        to a reference first. This situation can be triggered
                        by typecasting an int64 constant to a record of 8 bytes }
                      if left.location.size in [OS_64,OS_S64] then
                        location_force_mem(current_asmdata.CurrAsmList,left.location);
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                      cg.a_param_loc(current_asmdata.CurrAsmList,left.location,tempcgpara);
                    end;
                end;
@@ -548,7 +548,7 @@ implementation
                if cgsize<>OS_NO then
                 begin
                   location_reset(location,LOC_REGISTER,cgsize);
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
                   { x86-64 system v abi:
                     structs with up to 16 bytes are returned in registers }
                   if cgsize in [OS_128,OS_S128] then
@@ -561,7 +561,7 @@ implementation
                       cg.a_load_reg_ref(current_asmdata.CurrAsmList,OS_64,OS_64,procdefinition.funcretloc[callerside].registerhi,ref);
                     end
                   else
-{$else cpu64bit}
+{$else cpu64bitaddr}
                   if cgsize in [OS_64,OS_S64] then
                     begin
                       retloc:=procdefinition.funcretloc[callerside];
@@ -578,7 +578,7 @@ implementation
                       cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,retloc.register64.reghi,location.register64.reghi);
                     end
                   else
-{$endif cpu64bit}
+{$endif not cpu64bitaddr}
                     begin
                       { change register size after the unget because the
                         getregister was done for the full register
@@ -642,7 +642,7 @@ implementation
 
             case location.loc of
               LOC_REGISTER :
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                 if cgsize in [OS_64,OS_S64] then
                   cg64.a_load64_reg_loc(current_asmdata.CurrAsmList,location.register64,funcretnode.location)
                 else
@@ -952,7 +952,7 @@ implementation
                  if not is_interface(tprocdef(procdefinition)._class) then
                    begin
                      inc(current_asmdata.NextVTEntryNr);
-                     current_asmdata.CurrAsmList.Concat(tai_symbol.CreateName('VTREF'+tostr(current_asmdata.NextVTEntryNr)+'_'+tprocdef(procdefinition)._class.vmt_mangledname+'$$'+tostr(vmtoffset div sizeof(aint)),AT_FUNCTION,0));
+                     current_asmdata.CurrAsmList.Concat(tai_symbol.CreateName('VTREF'+tostr(current_asmdata.NextVTEntryNr)+'_'+tprocdef(procdefinition)._class.vmt_mangledname+'$$'+tostr(vmtoffset div sizeof(pint)),AT_FUNCTION,0));
                    end;
 {$endif vtentry}
 
@@ -1063,7 +1063,7 @@ implementation
             { for Cdecl functions we don't need to pop the funcret when it
               was pushed by para }
             if paramanager.ret_in_param(procdefinition.returndef,procdefinition.proccalloption) then
-              dec(pop_size,sizeof(aint));
+              dec(pop_size,sizeof(pint));
             { Remove parameters/alignment from the stack }
             pop_parasize(pop_size);
           end;
@@ -1076,14 +1076,14 @@ implementation
                LOC_REGISTER,
                LOC_CREGISTER:
                  begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                    if procdefinition.funcretloc[callerside].size in [OS_64,OS_S64] then
                      begin
                        exclude(regs_to_save_int,getsupreg(procdefinition.funcretloc[callerside].register64.reghi));
                        exclude(regs_to_save_int,getsupreg(procdefinition.funcretloc[callerside].register64.reglo));
                      end
                    else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                      exclude(regs_to_save_int,getsupreg(procdefinition.funcretloc[callerside].register));
                  end;
                LOC_FPUREGISTER,

compiler/ncgcnv.pas

@@ -103,9 +103,6 @@ interface
               end
             else
               location_force_reg(current_asmdata.CurrAsmList,location,newsize,false);
-{$ifndef cpu64bit}
-            // if is_signed(left.resultdef) and
-{$endif cpu64bit}
           end
         else
           begin
@@ -118,7 +115,7 @@ interface
             location_copy(location,left.location);
             location.size:=newsize;
             orgsize := def_cgsize(left.resultdef);
-            if (ressize < tcgsize2size[OS_INT]) and
+            if (ressize < sizeof(aint)) and
                (location.loc in [LOC_REGISTER,LOC_CREGISTER]) and
                (orgsize <> newsize) then
               begin
@@ -384,11 +381,11 @@ interface
     var r:Treference;
 
     begin
-      tg.gettemp(current_asmdata.currasmlist,2*sizeof(aword),tt_normal,r);
+      tg.gettemp(current_asmdata.currasmlist,2*sizeof(puint),tt_normal,r);
       location_reset(location,LOC_REFERENCE,OS_NO);
       location.reference:=r;
       cg.a_load_const_ref(current_asmdata.currasmlist,OS_ADDR,0,r);
-      inc(r.offset,sizeof(aword));
+      inc(r.offset,sizeof(puint));
       cg.a_load_const_ref(current_asmdata.currasmlist,OS_ADDR,0,r);
     end;
 

compiler/ncgcon.pas

@@ -240,11 +240,11 @@ implementation
     procedure tcgordconstnode.pass_generate_code;
       begin
          location_reset(location,LOC_CONSTANT,def_cgsize(resultdef));
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
          location.value:=value.svalue;
-{$else cpu64bit}
+{$else cpu64bitalu}
          location.value64:=value.svalue;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
       end;
 
 
@@ -415,9 +415,9 @@ implementation
                    maybe_new_object_file(current_asmdata.asmlists[al_typedconsts]);
                    if (len=0) or
                       not(cst_type in [cst_ansistring,cst_widestring]) then
-                     new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,lastlabel.name,const_align(sizeof(aint)))
+                     new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,lastlabel.name,const_align(sizeof(pint)))
                    else
-                     new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata,lastlabel.name,const_align(sizeof(aint)));
+                     new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata,lastlabel.name,const_align(sizeof(pint)));
                    current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(lastlabel));
                    { generate an ansi string ? }
                    case cst_type of
@@ -430,8 +430,8 @@ implementation
                              begin
                                 current_asmdata.getdatalabel(l1);
                                 current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_sym(l1));
-                                current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_aint(-1));
-                                current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_aint(len));
+                                current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_pint(-1));
+                                current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_pint(len));
                                 { make sure the string doesn't get dead stripped if the header is referenced }
                                 if (target_info.system in systems_darwin) then
                                   current_asmdata.asmlists[al_typedconsts].concat(tai_directive.create(asd_reference,l1.name));
@@ -463,8 +463,8 @@ implementation
                                   current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(len*cwidechartype.size))
                                 else
                                   begin
-                                    current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_aint(-1));
-                                    current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_aint(len*cwidechartype.size));
+                                    current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_pint(-1));
+                                    current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_pint(len*cwidechartype.size));
                                   end;
                                 { make sure the string doesn't get dead stripped if the header is referenced }
                                 if (target_info.system in systems_darwin) then
@@ -625,7 +625,7 @@ implementation
                  current_asmdata.getdatalabel(lastlabel);
                  lab_set:=lastlabel;
                  maybe_new_object_file(current_asmdata.asmlists[al_typedconsts]);
-                 new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,lastlabel.name,const_align(sizeof(aint)));
+                 new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,lastlabel.name,const_align(sizeof(pint)));
                  current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(lastlabel));
                  { already handled at the start of this method?? (JM)
                  if tsetdef(resultdef).settype=smallset then

compiler/ncgflw.pas

@@ -1317,12 +1317,12 @@ implementation
            begin
              exceptvarsym.localloc.loc:=LOC_REFERENCE;
              exceptvarsym.localloc.size:=OS_ADDR;
-             tg.GetLocal(current_asmdata.CurrAsmList,sizeof(aint),voidpointertype,exceptvarsym.localloc.reference);
+             tg.GetLocal(current_asmdata.CurrAsmList,sizeof(pint),voidpointertype,exceptvarsym.localloc.reference);
              cg.a_load_reg_ref(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,exceptvarsym.localloc.reference);
            end
          else
            begin
-             tg.GetTemp(current_asmdata.CurrAsmList,sizeof(aint),tt_normal,exceptref);
+             tg.GetTemp(current_asmdata.CurrAsmList,sizeof(pint),tt_normal,exceptref);
              cg.a_load_reg_ref(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,exceptref);
            end;
 

compiler/ncginl.pas

@@ -68,9 +68,9 @@ implementation
       nbas,ncon,ncal,ncnv,nld,ncgrtti,
       tgobj,ncgutil,
       cgutils,cgobj
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
       ,cg64f32
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
       ;
 
 
@@ -336,7 +336,7 @@ implementation
          end
         else
          begin
-           { length in ansi/wide strings is at offset -sizeof(aint) }
+           { length in ansi/wide strings is at offset -sizeof(pint) }
            location_force_reg(current_asmdata.CurrAsmList,left.location,OS_ADDR,false);
            current_asmdata.getjumplabel(lengthlab);
            cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_ADDR,OC_EQ,0,left.location.register,lengthlab);
@@ -348,7 +348,7 @@ implementation
              end
            else
              begin
-               reference_reset_base(href,left.location.register,-sizeof(aint));
+               reference_reset_base(href,left.location.register,-sizeof(pint));
                hregister:=cg.makeregsize(current_asmdata.CurrAsmList,left.location.register,OS_INT);
                cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,href,hregister);
              end;
@@ -381,11 +381,11 @@ implementation
         location_copy(location,left.location);
         location_force_reg(current_asmdata.CurrAsmList,location,cgsize,false);
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
         if cgsize in [OS_64,OS_S64] then
           cg64.a_op64_const_reg(current_asmdata.CurrAsmList,cgop,cgsize,1,location.register64)
         else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
           cg.a_op_const_reg(current_asmdata.CurrAsmList,cgop,location.size,1,location.register);
 
         cg.g_rangecheck(current_asmdata.CurrAsmList,location,resultdef,resultdef);
@@ -401,9 +401,9 @@ implementation
         var
          addvalue : TConstExprInt;
          addconstant : boolean;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          hregisterhi,
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
          hregister : tregister;
          cgsize : tcgsize;
         begin
@@ -442,9 +442,9 @@ implementation
                 begin
                   location_force_reg(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,cgsize,addvalue<=1);
                   hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                   hregisterhi:=tcallparanode(tcallparanode(left).right).left.location.register64.reghi;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                   { insert multiply with addvalue if its >1 }
                   if addvalue>1 then
                     cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,cgsize,addvalue.svalue,hregister);
@@ -454,22 +454,22 @@ implementation
           { write the add instruction }
           if addconstant then
             begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
               if cgsize in [OS_64,OS_S64] then
                 cg64.a_op64_const_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],cgsize,addvalue,tcallparanode(left).left.location)
               else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                 cg.a_op_const_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],
                   aint(addvalue.svalue),tcallparanode(left).left.location);
             end
            else
              begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                if cgsize in [OS_64,OS_S64] then
                  cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],cgsize,
                    joinreg64(hregister,hregisterhi),tcallparanode(left).left.location)
                else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                  cg.a_op_reg_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],
                    hregister,tcallparanode(left).left.location);
              end;
@@ -704,7 +704,7 @@ implementation
         begin
           location_reset(location,LOC_REGISTER,OS_ADDR);
           location.register:=cg.getaddressregister(current_asmdata.currasmlist);
-        {$ifdef cpu64bit}
+        {$ifdef cpu64bitaddr}
           reference_reset_base(frame_ref,current_procinfo.framepointer,8);
         {$else}
           reference_reset_base(frame_ref,current_procinfo.framepointer,4);

compiler/ncgld.pas

@@ -260,7 +260,7 @@ implementation
                              HashValue    : LongWord;
                            end;
                       }
-                      location.reference.offset:=sizeof(aint);
+                      location.reference.offset:=sizeof(pint);
                    end
                  else
                    internalerror(22798);
@@ -342,7 +342,7 @@ implementation
                            layout of a threadvar is (4 bytes pointer):
                              0 - Threadvar index
                              4 - Threadvar value in single threading }
-                         reference_reset_symbol(href,current_asmdata.RefAsmSymbol(tstaticvarsym(symtableentry).mangledname),sizeof(aint));
+                         reference_reset_symbol(href,current_asmdata.RefAsmSymbol(tstaticvarsym(symtableentry).mangledname),sizeof(pint));
                          cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,href,hregister);
                          cg.a_label(current_asmdata.CurrAsmList,endrelocatelab);
                          location.reference.base:=hregister;
@@ -408,13 +408,13 @@ implementation
                     internalerror(200312011);
                   if assigned(left) then
                     begin
-                      if (sizeof(aint) = 4) then
+                      if (sizeof(pint) = 4) then
                          location_reset(location,LOC_CREFERENCE,OS_64)
-                      else if (sizeof(aint) = 8) then
+                      else if (sizeof(pint) = 8) then
                          location_reset(location,LOC_CREFERENCE,OS_128)
                       else
                          internalerror(20020520);
-                      tg.GetTemp(current_asmdata.CurrAsmList,2*sizeof(aint),tt_normal,location.reference);
+                      tg.GetTemp(current_asmdata.CurrAsmList,2*sizeof(pint),tt_normal,location.reference);
                       secondpass(left);
 
                       { load class instance/classrefdef address }
@@ -445,7 +445,7 @@ implementation
 
                       { store the class instance or classredef address }
                       href:=location.reference;
-                      inc(href.offset,sizeof(aint));
+                      inc(href.offset,sizeof(pint));
                       cg.a_load_reg_ref(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,hregister,href);
 
                       { virtual method ? }
@@ -660,11 +660,11 @@ implementation
             case right.location.loc of
               LOC_CONSTANT :
                 begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                   if (left.location.size in [OS_64,OS_S64]) or (right.location.size in [OS_64,OS_S64]) then
                     cg64.a_load64_const_loc(current_asmdata.CurrAsmList,right.location.value64,left.location)
                   else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                     cg.a_load_const_loc(current_asmdata.CurrAsmList,right.location.value,left.location);
                 end;
               LOC_REFERENCE,
@@ -674,11 +674,11 @@ implementation
                     LOC_REGISTER,
                     LOC_CREGISTER :
                       begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                         if left.location.size in [OS_64,OS_S64] then
                           cg64.a_load64_ref_reg(current_asmdata.CurrAsmList,right.location.reference,left.location.register64)
                         else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                           cg.a_load_ref_reg(current_asmdata.CurrAsmList,right.location.size,left.location.size,right.location.reference,left.location.register);
                       end;
                     LOC_FPUREGISTER,
@@ -748,11 +748,11 @@ implementation
                       cg.a_load_ref_subsetreg(current_asmdata.CurrAsmList,right.location.size,left.location.size,right.location.reference,left.location.sreg);
                     LOC_SUBSETREF,
                     LOC_CSUBSETREF:
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                       if right.location.size in [OS_64,OS_S64] then
                        cg64.a_load64_ref_subsetref(current_asmdata.CurrAsmList,right.location.reference,left.location.sref)
                       else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                        cg.a_load_ref_subsetref(current_asmdata.CurrAsmList,right.location.size,left.location.size,right.location.reference,left.location.sref);
                     else
                       internalerror(200203284);
@@ -785,12 +785,12 @@ implementation
               LOC_REGISTER,
               LOC_CREGISTER :
                 begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                   if left.location.size in [OS_64,OS_S64] then
                     cg64.a_load64_reg_loc(current_asmdata.CurrAsmList,
                       right.location.register64,left.location)
                   else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                     cg.a_load_reg_loc(current_asmdata.CurrAsmList,right.location.size,right.location.register,left.location);
                 end;
               LOC_FPUREGISTER,
@@ -829,11 +829,11 @@ implementation
               LOC_SUBSETREF,
               LOC_CSUBSETREF:
                 begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                   if right.location.size in [OS_64,OS_S64] then
                    cg64.a_load64_subsetref_loc(current_asmdata.CurrAsmList,right.location.sref,left.location)
                   else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                   cg.a_load_subsetref_loc(current_asmdata.CurrAsmList,
                       right.location.size,right.location.sref,left.location);
                 end;
@@ -935,7 +935,7 @@ implementation
           internalerror(200608042);
         dovariant:=(nf_forcevaria in flags) or is_variant_array(resultdef);
         if dovariant then
-          elesize:=sizeof(aint)+sizeof(aint)
+          elesize:=sizeof(pint)+sizeof(pint)
         else
           elesize:=tarraydef(resultdef).elesize;
         location_reset(location,LOC_CREFERENCE,OS_NO);
@@ -1074,7 +1074,7 @@ implementation
                  if vtype=$ff then
                    internalerror(14357);
                  { write changing field update href to the next element }
-                 inc(href.offset,sizeof(aint));
+                 inc(href.offset,sizeof(pint));
                  if vaddr then
                   begin
                     location_force_mem(current_asmdata.CurrAsmList,hp.left.location);
@@ -1085,10 +1085,10 @@ implementation
                  else
                   cg.a_load_loc_ref(current_asmdata.CurrAsmList,OS_ADDR,hp.left.location,href);
                  { update href to the vtype field and write it }
-                 dec(href.offset,sizeof(aint));
+                 dec(href.offset,sizeof(pint));
                  cg.a_load_const_ref(current_asmdata.CurrAsmList, OS_INT,vtype,href);
                  { goto next array element }
-                 inc(href.offset,sizeof(aint)*2);
+                 inc(href.offset,sizeof(pint)*2);
                end
               else
               { normal array constructor of the same type }
@@ -1114,11 +1114,11 @@ implementation
                      end;
                    else
                      begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                        if hp.left.location.size in [OS_64,OS_S64] then
                          cg64.a_load64_loc_ref(current_asmdata.CurrAsmList,hp.left.location,href)
                        else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                          cg.a_load_loc_ref(current_asmdata.CurrAsmList,hp.left.location.size,hp.left.location,href);
                      end;
                  end;

compiler/ncgmat.pas

@@ -45,9 +45,9 @@ interface
 {$ifdef SUPPORT_MMX}
          procedure second_mmx;virtual;abstract;
 {$endif SUPPORT_MMX}
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          procedure second_64bit;virtual;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
          procedure second_integer;virtual;
          procedure second_float;virtual;
       public
@@ -81,7 +81,7 @@ interface
            been done and emitted, so this should really a do a modulo.
          }
          procedure emit_mod_reg_reg(signed: boolean;denum,num : tregister);virtual;abstract;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          { This routine must do an actual 64-bit division, be it
            signed or unsigned. The result must set into the the
            @var(num) register.
@@ -96,13 +96,13 @@ interface
            64-bit systems, otherwise a helper is called in 1st pass.
          }
          procedure emit64_div_reg_reg(signed: boolean;denum,num : tregister64);virtual;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
       end;
 
       tcgshlshrnode = class(tshlshrnode)
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          procedure second_64bit;virtual;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
          procedure second_integer;virtual;
          procedure pass_generate_code;override;
       end;
@@ -113,9 +113,9 @@ interface
 {$ifdef SUPPORT_MMX}
          procedure second_mmx;virtual;abstract;
 {$endif SUPPORT_MMX}
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          procedure second_64bit;virtual;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
          procedure second_integer;virtual;
       public
          procedure pass_generate_code;override;
@@ -132,9 +132,9 @@ implementation
       pass_2,
       ncon,
       tgobj,ncgutil,cgobj,cgutils,paramgr
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
       ,cg64f32
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
       ;
 
 {*****************************************************************************
@@ -171,7 +171,7 @@ implementation
       end;
 
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
     procedure tcgunaryminusnode.second_64bit;
       var
         tr: tregister;
@@ -197,7 +197,7 @@ implementation
             cg.a_label(current_asmdata.CurrAsmList,hl);
           end;
       end;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
 
     procedure tcgunaryminusnode.second_float;
       begin
@@ -252,11 +252,11 @@ implementation
 
     procedure tcgunaryminusnode.pass_generate_code;
       begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          if is_64bit(left.resultdef) then
            second_64bit
          else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
 {$ifdef SUPPORT_MMX}
            if (cs_mmx in current_settings.localswitches) and is_mmx_able_array(left.resultdef) then
              second_mmx
@@ -273,7 +273,7 @@ implementation
                              TCGMODDIVNODE
 *****************************************************************************}
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
     procedure tcgmoddivnode.emit64_div_reg_reg(signed: boolean; denum,num:tregister64);
       begin
         { handled in pass_1 already, unless pass_1 is
@@ -282,7 +282,7 @@ implementation
         { should be handled in pass_1 (JM) }
         internalerror(200109052);
       end;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
 
 
     procedure tcgmoddivnode.pass_generate_code;
@@ -302,7 +302,7 @@ implementation
           exit;
          location_copy(location,left.location);
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          if is_64bit(resultdef) then
            begin
               if is_signed(left.resultdef) then
@@ -321,7 +321,7 @@ implementation
                joinreg64(location.register64.reglo,location.register64.reghi));
            end
          else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
            begin
               if is_signed(left.resultdef) then
                 opsize:=OS_SINT
@@ -391,13 +391,13 @@ implementation
 *****************************************************************************}
 
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
     procedure tcgshlshrnode.second_64bit;
       begin
          { already hanled in 1st pass }
          internalerror(2002081501);
       end;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
 
 
     procedure tcgshlshrnode.second_integer;
@@ -455,11 +455,11 @@ implementation
       begin
          secondpass(left);
          secondpass(right);
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          if is_64bit(left.resultdef) then
            second_64bit
          else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
            second_integer;
       end;
 
@@ -468,7 +468,7 @@ implementation
                                TCGNOTNODE
 *****************************************************************************}
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
     procedure tcgnotnode.second_64bit;
       begin
         secondpass(left);
@@ -477,7 +477,7 @@ implementation
         { perform the NOT operation }
         cg64.a_op64_reg_reg(current_asmdata.CurrAsmList,OP_NOT,location.size,left.location.register64,location.register64);
       end;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
 
 
     procedure tcgnotnode.second_integer;
@@ -498,10 +498,10 @@ implementation
         else if (cs_mmx in current_settings.localswitches) and is_mmx_able_array(left.resultdef) then
           second_mmx
 {$endif SUPPORT_MMX}
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
         else if is_64bit(left.resultdef) then
           second_64bit
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
         else
           second_integer;
       end;

compiler/ncgmem.pas

@@ -318,7 +318,7 @@ implementation
                LOC_REGISTER,
                LOC_CREGISTER:
                  begin
-                   if (left.resultdef.size > sizeof(aint)) then
+                   if (left.resultdef.size > sizeof(pint)) then
                      location_force_mem(current_asmdata.CurrAsmList,location)
                    else
                      begin
@@ -756,7 +756,7 @@ implementation
                               paramanager.allocparaloc(current_asmdata.CurrAsmList,paraloc2);
                               cg.a_param_const(current_asmdata.CurrAsmList,OS_INT,tordconstnode(right).value.svalue,paraloc2);
                               href:=location.reference;
-                              dec(href.offset,sizeof(aint)-offsetdec);
+                              dec(href.offset,sizeof(pint)-offsetdec);
                               paramanager.allocparaloc(current_asmdata.CurrAsmList,paraloc1);
                               cg.a_param_ref(current_asmdata.CurrAsmList,OS_INT,href,paraloc1);
                               paramanager.freeparaloc(current_asmdata.CurrAsmList,paraloc1);
@@ -909,7 +909,7 @@ implementation
                               paramanager.allocparaloc(current_asmdata.CurrAsmList,paraloc2);
                               cg.a_param_reg(current_asmdata.CurrAsmList,OS_INT,right.location.register,paraloc2);
                               href:=location.reference;
-                              dec(href.offset,sizeof(aint)-offsetdec);
+                              dec(href.offset,sizeof(pint)-offsetdec);
                               //dec(href.offset,7);
                               paramanager.allocparaloc(current_asmdata.CurrAsmList,paraloc1);
                               cg.a_param_ref(current_asmdata.CurrAsmList,OS_INT,href,paraloc1);

compiler/ncgrtti.pas

@@ -545,11 +545,11 @@ implementation
            if (tf_requires_proper_alignment in target_info.flags) then
              current_asmdata.asmlists[al_rtti].concat(cai_align.Create(sizeof(TConstPtrUInt)));
            { size of elements }
-           current_asmdata.asmlists[al_rtti].concat(Tai_const.Create_aint(def.elesize));
+           current_asmdata.asmlists[al_rtti].concat(Tai_const.Create_pint(def.elesize));
 
            if not(ado_IsDynamicArray in def.arrayoptions) then
              begin
-               current_asmdata.asmlists[al_rtti].concat(Tai_const.Create_aint(aint(def.elecount)));
+               current_asmdata.asmlists[al_rtti].concat(Tai_const.Create_pint(pint(def.elecount)));
                { element type }
                current_asmdata.asmlists[al_rtti].concat(Tai_const.Create_sym(ref_rtti(def.elementdef,rt)));
              end
@@ -572,7 +572,7 @@ implementation
                if def.elementdef.needs_inittable then
                  current_asmdata.asmlists[al_rtti].concat(Tai_const.Create_sym(ref_rtti(def.elementdef,rt)))
                else
-                 current_asmdata.asmlists[al_rtti].concat(Tai_const.Create_aint(0));
+                 current_asmdata.asmlists[al_rtti].concat(Tai_const.Create_pint(0));
                { dummy DynUnitName }
                current_asmdata.asmlists[al_rtti].concat(Tai_const.Create_8bit(0));
              end;
@@ -940,13 +940,13 @@ implementation
           inc(st);
           if (tf_requires_proper_alignment in target_info.flags) then
             align(st,sizeof(Tconstptruint));
-          inc(st,8+sizeof(aint));
+          inc(st,8+sizeof(pint));
           { write rtti data }
           with current_asmdata do
             begin
               rttilab:=defineasmsymbol(Tstoreddef(def).rtti_mangledname(rt)+'_o2s',AB_GLOBAL,AT_DATA);
               maybe_new_object_file(asmlists[al_rtti]);
-              new_section(asmlists[al_rtti],sec_rodata,rttilab.name,const_align(sizeof(aint)));
+              new_section(asmlists[al_rtti],sec_rodata,rttilab.name,const_align(sizeof(pint)));
               asmlists[al_rtti].concat(Tai_symbol.create_global(rttilab,0));
               asmlists[al_rtti].concat(Tai_const.create_32bit(longint(mode)));
               if mode=lookup then
@@ -956,7 +956,7 @@ implementation
                     begin
                       while o<syms[i].value do
                         begin
-                          asmlists[al_rtti].concat(Tai_const.create_aint(0));
+                          asmlists[al_rtti].concat(Tai_const.create_pint(0));
                           inc(o);
                         end;
                       inc(o);
@@ -1046,13 +1046,13 @@ implementation
           inc(st);
           if (tf_requires_proper_alignment in target_info.flags) then
             align(st,sizeof(Tconstptruint));
-          inc(st,8+sizeof(aint));
+          inc(st,8+sizeof(pint));
           { write rtti data }
           with current_asmdata do
             begin
               rttilab:=defineasmsymbol(Tstoreddef(def).rtti_mangledname(rt)+'_s2o',AB_GLOBAL,AT_DATA);
               maybe_new_object_file(asmlists[al_rtti]);
-              new_section(asmlists[al_rtti],sec_rodata,rttilab.name,const_align(sizeof(aint)));
+              new_section(asmlists[al_rtti],sec_rodata,rttilab.name,const_align(sizeof(pint)));
               asmlists[al_rtti].concat(Tai_symbol.create_global(rttilab,0));
               asmlists[al_rtti].concat(Tai_const.create_32bit(sym_count));
               for i:=0 to sym_count-1 do
@@ -1124,7 +1124,7 @@ implementation
         { write rtti data }
         rttilab:=current_asmdata.DefineAsmSymbol(tstoreddef(def).rtti_mangledname(rt),AB_GLOBAL,AT_DATA);
         maybe_new_object_file(current_asmdata.asmlists[al_rtti]);
-        new_section(current_asmdata.asmlists[al_rtti],sec_rodata,rttilab.name,const_align(sizeof(aint)));
+        new_section(current_asmdata.asmlists[al_rtti],sec_rodata,rttilab.name,const_align(sizeof(pint)));
         current_asmdata.asmlists[al_rtti].concat(Tai_symbol.Create_global(rttilab,0));
         write_rtti_data(def,rt);
         current_asmdata.asmlists[al_rtti].concat(Tai_symbol_end.Create(rttilab));

compiler/ncgset.pas

@@ -575,17 +575,17 @@ implementation
 
       procedure genitem(t : pcaselabel);
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
         var
            l1 : tasmlabel;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
 
         begin
            if assigned(t^.less) then
              genitem(t^.less);
            if t^._low=t^._high then
              begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                 if opsize in [OS_S64,OS_64] then
                   begin
                      current_asmdata.getjumplabel(l1);
@@ -594,7 +594,7 @@ implementation
                      cg.a_label(current_asmdata.CurrAsmList,l1);
                   end
                 else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                   begin
                      cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, aint(t^._low.svalue),hregister, blocklabel(t^.blockid));
                   end;
@@ -609,7 +609,7 @@ implementation
                 { ELSE-label                                }
                 if not lastwasrange or (t^._low-last>1) then
                   begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                      if opsize in [OS_64,OS_S64] then
                        begin
                           current_asmdata.getjumplabel(l1);
@@ -622,13 +622,13 @@ implementation
                           cg.a_label(current_asmdata.CurrAsmList,l1);
                        end
                      else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                        begin
                         cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_lt, aint(t^._low.svalue), hregister,
                            elselabel);
                        end;
                   end;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                 if opsize in [OS_S64,OS_64] then
                   begin
                      current_asmdata.getjumplabel(l1);
@@ -640,7 +640,7 @@ implementation
                     cg.a_label(current_asmdata.CurrAsmList,l1);
                   end
                 else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                   begin
                      cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_le, aint(t^._high.svalue), hregister, blocklabel(t^.blockid));
                   end;
@@ -714,14 +714,14 @@ implementation
          opsize:=def_cgsize(left.resultdef);
          { copy the case expression to a register }
          location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,false);
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          if opsize in [OS_S64,OS_64] then
            begin
              hregister:=left.location.register64.reglo;
              hregister2:=left.location.register64.reghi;
            end
          else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
            hregister:=left.location.register;
          if isjump then
           begin
@@ -740,11 +740,11 @@ implementation
 {$ifdef OLDREGVARS}
          load_all_regvars(current_asmdata.CurrAsmList);
 {$endif OLDREGVARS}
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          if opsize in [OS_64,OS_S64] then
            genlinearcmplist(labels)
          else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
            begin
               if cs_opt_level1 in current_settings.optimizerswitches then
                 begin

compiler/ncgutil.pas

@@ -31,9 +31,9 @@ interface
       cpubase,cgbase,parabase,cgutils,
       aasmbase,aasmtai,aasmdata,aasmcpu,
       symconst,symbase,symdef,symsym,symtype,symtable
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
       ,cg64f32
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
       ;
 
     type
@@ -125,7 +125,7 @@ interface
 
     const
 
-      EXCEPT_BUF_SIZE = 3*sizeof(aint);
+      EXCEPT_BUF_SIZE = 3*sizeof(pint);
     type
       texceptiontemps=record
         jmpbuf,
@@ -341,7 +341,7 @@ implementation
           end;
         tg.GetTemp(list,EXCEPT_BUF_SIZE,tt_persistent,t.envbuf);
         tg.GetTemp(list,jmp_buf_size,tt_persistent,t.jmpbuf);
-        tg.GetTemp(list,sizeof(aint),tt_persistent,t.reasonbuf);
+        tg.GetTemp(list,sizeof(pint),tt_persistent,t.reasonbuf);
       end;
 
 
@@ -415,7 +415,7 @@ implementation
                                      TLocation
 *****************************************************************************}
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
     { 32-bit version }
     procedure location_force_reg(list:TAsmList;var l:tlocation;dst_size:TCGSize;maybeconst:boolean);
       var
@@ -523,7 +523,7 @@ implementation
               (l.loc = LOC_CREGISTER) and
               (TCGSize2Size[l.size] = TCGSize2Size[dst_size]) and
               ((l.size = dst_size) or
-               (TCGSize2Size[l.size] = TCGSize2Size[OS_INT]));
+               (TCGSize2Size[l.size] = sizeof(aint)));
            if not const_location then
              hregister:=cg.getintregister(list,dst_size)
            else
@@ -583,7 +583,7 @@ implementation
          location_freetemp(list,oldloc);
      end;
 
-{$else cpu64bit}
+{$else not cpu64bitalu}
 
     { 64-bit version }
     procedure location_force_reg(list:TAsmList;var l:tlocation;dst_size:TCGSize;maybeconst:boolean);
@@ -645,7 +645,7 @@ implementation
         if oldloc.loc=LOC_REFERENCE then
           location_freetemp(list,oldloc);
       end;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
 
 
     procedure location_force_fpureg(list:TAsmList;var l: tlocation;maybeconst:boolean);
@@ -766,11 +766,11 @@ implementation
           LOC_CREGISTER :
             begin
               tg.GetTemp(list,TCGSize2Size[l.size],tt_normal,r);
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
               if l.size in [OS_64,OS_S64] then
                 cg64.a_load64_loc_ref(list,l,r)
               else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                 cg.a_load_loc_ref(list,l.size,l,r);
               location_reset(l,LOC_REFERENCE,l.size);
               l.reference:=r;
@@ -898,11 +898,11 @@ implementation
 
 
     const
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
       trashintvalues: array[0..nroftrashvalues-1] of aint = ($5555555555555555,aint($AAAAAAAAAAAAAAAA),aint($EFEFEFEFEFEFEFEF),0);
-{$else cpu64bit}
+{$else cpu64bitalu}
       trashintvalues: array[0..nroftrashvalues-1] of aint = ($55555555,aint($AAAAAAAA),aint($EFEFEFEF),0);
-{$endif cpu64bit}
+{$endif cpu64bitalu}
 
     procedure trash_reference(list: TAsmList; const ref: treference; size: aint);
       var
@@ -917,9 +917,9 @@ implementation
           1: cg.a_load_const_ref(list,OS_8,byte(trashintval),ref);
           2: cg.a_load_const_ref(list,OS_16,word(trashintval),ref);
           4: cg.a_load_const_ref(list,OS_32,longint(trashintval),ref);
-          {$ifdef cpu64bit}
+          {$ifdef cpu64bitalu}
           8: cg.a_load_const_ref(list,OS_64,int64(trashintval),ref);
-          {$endif cpu64bit}
+          {$endif cpu64bitalu}
           else
             begin
               countreg := cg.getintregister(list,OS_ADDR);
@@ -1006,11 +1006,11 @@ implementation
            case tstaticvarsym(p).initialloc.loc of
              LOC_CREGISTER :
                begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                  if (tstaticvarsym(p).initialloc.size in [OS_64,OS_S64]) then
                    cg64.a_load64_const_reg(TAsmList(arg),0,tstaticvarsym(p).initialloc.register64)
                  else
-{$endif not cpu64bit}
+{$endif not cpu64bitalu}
                    cg.a_load_const_reg(TAsmList(arg),reg_cgsize(tstaticvarsym(p).initialloc.register),0,
                        tstaticvarsym(p).initialloc.register);
                end;
@@ -1332,7 +1332,7 @@ implementation
             case funcretloc.loc of
               LOC_REGISTER:
                 begin
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
                   if current_procinfo.procdef.funcretloc[calleeside].size in [OS_128,OS_S128] then
                     begin
                       resloc:=current_procinfo.procdef.funcretloc[calleeside];
@@ -1402,7 +1402,7 @@ implementation
                         end;
                       end
                     else
-{$else cpu64bit}
+{$else cpu64bitaddr}
                   if current_procinfo.procdef.funcretloc[calleeside].size in [OS_64,OS_S64] then
                     begin
                       resloc:=current_procinfo.procdef.funcretloc[calleeside];
@@ -1446,7 +1446,7 @@ implementation
                       end;
                     end
                   else
-{$endif cpu64bit}
+{$endif not cpu64bitaddr}
                   { this code is for structures etc. being returned in registers and having odd sizes }
                   if (current_procinfo.procdef.funcretloc[calleeside].size=OS_32) and
                     not(restmploc.size in [OS_S32,OS_32]) then
@@ -1530,14 +1530,14 @@ implementation
         case sym.initialloc.loc of
           LOC_CREGISTER:
             begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
               if sym.initialloc.size in [OS_64,OS_S64] then
                 begin
                   sym.initialloc.register64.reglo:=cg.getintregister(list,OS_32);
                   sym.initialloc.register64.reghi:=cg.getintregister(list,OS_32);
                 end
               else
-{$endif cpu64bit}
+{$endif cpu64bitalu}
                 sym.initialloc.register:=cg.getintregister(list,sym.initialloc.size);
             end;
           LOC_CFPUREGISTER:
@@ -1554,14 +1554,14 @@ implementation
           begin
             { Allocate register already, to prevent first allocation to be
               inside a loop }
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
             if sym.initialloc.size in [OS_64,OS_S64] then
               begin
                 cg.a_reg_sync(list,sym.initialloc.register64.reglo);
                 cg.a_reg_sync(list,sym.initialloc.register64.reghi);
               end
             else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
              cg.a_reg_sync(list,sym.initialloc.register);
           end;
         sym.localloc:=sym.initialloc;
@@ -1746,7 +1746,7 @@ implementation
                 end;
               LOC_CREGISTER :
                 begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                   if (currpara.paraloc[calleeside].size in [OS_64,OS_S64]) and
                      is_64bit(currpara.vardef) then
                     begin
@@ -1788,7 +1788,7 @@ implementation
                       end
                     end
                   else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                     begin
                       if assigned(paraloc^.next) then
                         internalerror(200410105);
@@ -2130,7 +2130,7 @@ implementation
           begin
             parasize:=0;
             if paramanager.ret_in_param(current_procinfo.procdef.returndef,current_procinfo.procdef.proccalloption) then
-              inc(parasize,sizeof(aint));
+              inc(parasize,sizeof(pint));
           end
         else
           parasize:=current_procinfo.para_stack_size;
@@ -2254,11 +2254,11 @@ implementation
           begin
             if (vo_is_thread_var in sym.varoptions) then
               begin
-                inc(l,sizeof(aint));
+                inc(l,sizeof(pint));
                 { it doesn't help to set a higher alignment, as  }
-                { the first sizeof(aint) bytes field will offset }
+                { the first sizeof(pint) bytes field will offset }
                 { everything anyway                              }
-                varalign:=sizeof(aint);
+                varalign:=sizeof(pint);
               end;
             list:=current_asmdata.asmlists[al_globals];
             sectype:=sec_bss;
@@ -2352,7 +2352,7 @@ implementation
                           else
                             begin
                               if isaddr then
-                                tg.GetLocal(list,sizeof(aint),voidpointertype,vs.initialloc.reference)
+                                tg.GetLocal(list,sizeof(pint),voidpointertype,vs.initialloc.reference)
                               else
                                 tg.GetLocal(list,vs.getsize,tparavarsym(sym).paraloc[calleeside].alignment,vs.vardef,vs.initialloc.reference);
                             end;
@@ -2396,14 +2396,14 @@ implementation
       begin
         case location.loc of
           LOC_CREGISTER:
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
             if location.size in [OS_64,OS_S64] then
               begin
                 rv.intregvars.addnodup(getsupreg(location.register64.reglo));
                 rv.intregvars.addnodup(getsupreg(location.register64.reghi));
               end
             else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
               rv.intregvars.addnodup(getsupreg(location.register));
           LOC_CFPUREGISTER:
             rv.fpuregvars.addnodup(getsupreg(location.register));
@@ -2514,9 +2514,9 @@ implementation
       preplaceregrec = ^treplaceregrec;
       treplaceregrec = record
         old, new: tregister;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
         oldhi, newhi: tregister;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
         ressym: tsym;
       end;
 
@@ -2537,7 +2537,7 @@ implementation
                  (tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.loc in [LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMXREGISTER,LOC_CMMREGISTER]) and
                  (tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.register = rr^.old) then
                 begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                   { it's possible a 64 bit location was shifted and/xor typecasted }
                   { in a 32 bit value, so only 1 register was left in the location }
                   if (tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.size in [OS_64,OS_S64]) then
@@ -2545,7 +2545,7 @@ implementation
                       tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.register64.reghi := rr^.newhi
                     else
                       exit;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                   tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.register := rr^.new;
                   result := fen_norecurse_true;
                 end;
@@ -2556,7 +2556,7 @@ implementation
                  (ttemprefnode(n).tempinfo^.location.loc in [LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMXREGISTER,LOC_CMMREGISTER]) and
                  (ttemprefnode(n).tempinfo^.location.register = rr^.old) then
                 begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                   { it's possible a 64 bit location was shifted and/xor typecasted }
                   { in a 32 bit value, so only 1 register was left in the location }
                   if (ttemprefnode(n).tempinfo^.location.size in [OS_64,OS_S64]) then
@@ -2564,7 +2564,7 @@ implementation
                       ttemprefnode(n).tempinfo^.location.register64.reghi := rr^.newhi
                     else
                       exit;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                   ttemprefnode(n).tempinfo^.location.register := rr^.new;
                   result := fen_norecurse_true;
                 end;
@@ -2592,13 +2592,13 @@ implementation
           exit;
         rr.old := n.location.register;
         rr.ressym := nil;
-      {$ifndef cpu64bit}
+      {$ifndef cpu64bitalu}
         rr.oldhi := NR_NO;
-      {$endif cpu64bit}
+      {$endif not cpu64bitalu}
         case n.location.loc of
           LOC_CREGISTER:
             begin
-      {$ifndef cpu64bit}
+      {$ifndef cpu64bitalu}
               if (n.location.size in [OS_64,OS_S64]) then
                 begin
                   rr.oldhi := n.location.register64.reghi;
@@ -2606,7 +2606,7 @@ implementation
                   rr.newhi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
                 end
               else
-      {$endif cpu64bit}
+      {$endif not cpu64bitalu}
                 rr.new := cg.getintregister(current_asmdata.CurrAsmList,n.location.size);
             end;
           LOC_CFPUREGISTER:
@@ -2636,11 +2636,11 @@ implementation
           case n.location.loc of
             LOC_CREGISTER:
               begin
-      {$ifndef cpu64bit}
+      {$ifndef cpu64bitalu}
                 if (n.location.size in [OS_64,OS_S64]) then
                   cg64.a_load64_reg_reg(list,n.location.register64,joinreg64(rr.new,rr.newhi))
                 else
-      {$endif cpu64bit}
+      {$endif not cpu64bitalu}
                   cg.a_load_reg_reg(list,n.location.size,n.location.size,n.location.register,rr.new);
               end;
             LOC_CFPUREGISTER:
@@ -2656,14 +2656,14 @@ implementation
           end;
 
         { now that we've change the loadn/temp, also change the node result location }
-      {$ifndef cpu64bit}
+      {$ifndef cpu64bitalu}
         if (n.location.size in [OS_64,OS_S64]) then
           begin
             n.location.register64.reglo := rr.new;
             n.location.register64.reghi := rr.newhi;
           end
         else
-      {$endif cpu64bit}
+      {$endif not cpu64bitalu}
           n.location.register := rr.new;
       end;
 
@@ -2686,14 +2686,14 @@ implementation
                     case localloc.loc of
                       LOC_CREGISTER :
                         if (pi_has_goto in current_procinfo.flags) then
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                           if def_cgsize(vardef) in [OS_64,OS_S64] then
                             begin
                               cg.a_reg_sync(list,localloc.register64.reglo);
                               cg.a_reg_sync(list,localloc.register64.reghi);
                             end
                           else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                             cg.a_reg_sync(list,localloc.register);
                       LOC_CFPUREGISTER,
                       LOC_CMMREGISTER:

compiler/ncnv.pas

@@ -1953,7 +1953,7 @@ implementation
       end;
 
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
 
     { checks whether we can safely remove 64 bit typeconversions }
     { in case range and overflow checking are off, and in case   }
@@ -2040,7 +2040,7 @@ implementation
             n.resultdef:=todef;
         end;
       end;
-{$endif not cpu64bit}
+{$endif not cpu64bitaddr}
 
 
     function ttypeconvnode.simplify: tnode;
@@ -2190,7 +2190,7 @@ implementation
             end;
         end;
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
         { must be done before code below, because we need the
           typeconversions for ordconstn's as well }
         case convtype of
@@ -2209,7 +2209,7 @@ implementation
                 end;
             end;
         end;
-{$endif cpu64bit}
+{$endif not cpu64bitaddr}
 
       end;
 

compiler/ninl.pas

@@ -301,7 +301,7 @@ implementation
           procname:=procname+'enum'
         else
           case torddef(source.resultdef).ordtype of
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
             u64bit:
               procname := procname + 'uint';
 {$else}
@@ -445,9 +445,9 @@ implementation
             orddef :
               begin
                 case Torddef(para.left.resultdef).ordtype of
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
                   s64bit,
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                   s8bit,
                   s16bit,
                   s32bit :
@@ -455,9 +455,9 @@ implementation
                       name := procprefixes[do_read]+'sint';
                       readfunctype:=sinttype;
                     end;
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
                   u64bit,
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                   u8bit,
                   u16bit,
                   u32bit :
@@ -475,7 +475,7 @@ implementation
                       name := procprefixes[do_read]+'widechar';
                       readfunctype:=cwidechartype;
                     end;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
                   s64bit :
                     begin
                       name := procprefixes[do_read]+'int64';
@@ -486,7 +486,7 @@ implementation
                       name := procprefixes[do_read]+'qword';
                       readfunctype:=u64inttype;
                     end;
-{$endif cpu64bit}
+{$endif not cpu64bitaddr}
                   scurrency:
                     begin
                       name := procprefixes[do_read]+'currency';
@@ -1120,9 +1120,9 @@ implementation
         if assigned(codepara) and
            (
             (codepara.resultdef.typ <> orddef)
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
             or is_64bitint(codepara.resultdef)
-{$endif cpu64bit}
+{$endif not cpu64bitaddr}
             ) then
           begin
             CGMessagePos1(codepara.fileinfo,type_e_integer_expr_expected,codepara.resultdef.typename);
@@ -1188,9 +1188,9 @@ implementation
           orddef:
             begin
               case torddef(destpara.resultdef).ordtype of
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
                 s64bit,
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                 s8bit,
                 s16bit,
                 s32bit:
@@ -1200,17 +1200,17 @@ implementation
                     sizepara := ccallparanode.create(cordconstnode.create
                       (destpara.resultdef.size,s32inttype,true),nil);
                   end;
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
                 u64bit,
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                 u8bit,
                 u16bit,
                 u32bit:
                    suffix := 'uint_';
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
                 s64bit: suffix := 'int64_';
                 u64bit: suffix := 'qword_';
-{$endif cpu64bit}
+{$endif not cpu64bitaddr}
                 scurrency: suffix := 'currency_';
                 else
                   internalerror(200304225);
@@ -2569,11 +2569,11 @@ implementation
                    typecheckpass(hpp);
 
                    if not((hpp.resultdef.typ=orddef) and
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
                           (torddef(hpp.resultdef).ordtype<>u32bit)) then
-{$else not cpu64bit}
+{$else not cpu64bitaddr}
                           (torddef(hpp.resultdef).ordtype<>u64bit)) then
-{$endif not cpu64bit}
+{$endif not cpu64bitaddr}
                      inserttypeconv_internal(hpp,sinttype);
                    { make sure we don't call functions part of the left node twice (and generally }
                    { optimize the code generation)                                                }
@@ -2608,11 +2608,11 @@ implementation
                    { assign result of addition }
                    if not(is_integer(resultnode.resultdef)) then
                      inserttypeconv(hpp,torddef.create(
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
                        s64bit,
-{$else cpu64bit}
+{$else cpu64bitaddr}
                        s32bit,
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                        get_min_value(resultnode.resultdef),
                        get_max_value(resultnode.resultdef)))
                    else

compiler/nmat.pas

@@ -34,11 +34,11 @@ interface
           function pass_typecheck:tnode;override;
           function simplify : tnode;override;
          protected
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
           { override the following if you want to implement }
           { parts explicitely in the code generator (JM)    }
           function first_moddiv64bitint: tnode; virtual;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
           function firstoptimize: tnode; virtual;
           function first_moddivint: tnode; virtual;
        end;
@@ -48,14 +48,14 @@ interface
           function pass_1 : tnode;override;
           function pass_typecheck:tnode;override;
           function simplify : tnode;override;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
           { override the following if you want to implement }
           { parts explicitely in the code generator (CEC)
             Should return nil, if everything will be handled
             in the code generator
           }
           function first_shlshr64bitint: tnode; virtual;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
        end;
        tshlshrnodeclass = class of tshlshrnode;
 
@@ -224,7 +224,7 @@ implementation
              resultdef:=left.resultdef;
            end
          else
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
           { when there is one 64bit value, everything is done
             in 64bit }
           if (is_64bitint(left.resultdef) or
@@ -261,7 +261,7 @@ implementation
               resultdef:=left.resultdef;
            end
          else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
            begin
               { Make everything always default singed int }
               if not(rd.ordtype in [torddef(sinttype).ordtype,torddef(uinttype).ordtype]) then
@@ -317,7 +317,7 @@ implementation
 {$endif cpuneedsdiv32helper}
 
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
     function tmoddivnode.first_moddiv64bitint: tnode;
       var
         procname: string[31];
@@ -350,7 +350,7 @@ implementation
         right := nil;
         firstpass(result);
       end;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
 
 
     function tmoddivnode.firstoptimize: tnode;
@@ -424,7 +424,7 @@ implementation
          if assigned(result) then
            exit;
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          { 64bit }
          if (left.resultdef.typ=orddef) and
             (right.resultdef.typ=orddef) and
@@ -436,7 +436,7 @@ implementation
              expectloc:=LOC_REGISTER;
            end
          else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
            begin
              result := first_moddivint;
              if assigned(result) then
@@ -519,7 +519,7 @@ implementation
       end;
 
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
     function tshlshrnode.first_shlshr64bitint: tnode;
       var
         procname: string[31];
@@ -538,7 +538,7 @@ implementation
         right := nil;
         firstpass(result);
       end;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
 
 
     function tshlshrnode.pass_1 : tnode;
@@ -551,7 +551,7 @@ implementation
          if codegenerror then
            exit;
 
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          { 64 bit ints have their own shift handling }
          if is_64bit(left.resultdef) then
            begin
@@ -561,7 +561,7 @@ implementation
              regs:=2;
            end
          else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
            begin
              regs:=1
            end;
@@ -634,13 +634,13 @@ implementation
                }
              end
 {$endif SUPPORT_MMX}
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
          else if is_64bit(left.resultdef) then
            begin
              inserttypeconv(left,s64inttype);
              resultdef:=left.resultdef
            end
-{$endif cpu64bit}
+{$endif not cpu64bitaddr}
          else if (left.resultdef.typ=orddef) then
            begin
              inserttypeconv(left,sinttype);
@@ -845,12 +845,12 @@ implementation
              end
          else
 {$endif SUPPORT_MMX}
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
            if is_64bitint(left.resultdef) then
              begin
              end
          else
-{$endif cpu64bit}
+{$endif not cpu64bitaddr}
            if is_integer(left.resultdef) then
              begin
              end
@@ -895,14 +895,14 @@ implementation
              expectloc:=LOC_MMXREGISTER
          else
 {$endif SUPPORT_MMX}
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
            if is_64bit(left.resultdef) then
              begin
                 if (expectloc in [LOC_REFERENCE,LOC_CREFERENCE,LOC_CREGISTER]) then
                   expectloc:=LOC_REGISTER;
              end
          else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
            if is_integer(left.resultdef) then
              expectloc:=LOC_REGISTER;
       end;

compiler/nmem.pas

@@ -608,7 +608,7 @@ implementation
                LOC_REGISTER,
                LOC_SUBSETREG:
                  // can happen for function results on win32 and darwin/x86
-                 if (left.resultdef.size > sizeof(aint)) then
+                 if (left.resultdef.size > sizeof(pint)) then
                    expectloc:=LOC_REFERENCE
                  else
                    expectloc:=LOC_SUBSETREG;

compiler/nobj.pas

@@ -645,9 +645,9 @@ implementation
                 { allocate a pointer in the object memory }
                 with tObjectSymtable(_class.symtable) do
                   begin
-                    datasize:=align(datasize,sizeof(aint));
+                    datasize:=align(datasize,sizeof(pint));
                     ImplIntf.Ioffset:=datasize;
-                    datasize:=datasize+sizeof(aint);
+                    datasize:=datasize+sizeof(pint);
                   end;
               end;
           end;
@@ -820,7 +820,7 @@ implementation
          current_asmdata.getdatalabel(p^.nl);
          if assigned(p^.l) then
            writenames(p^.l);
-         current_asmdata.asmlists[al_globals].concat(cai_align.create(const_align(sizeof(aint))));
+         current_asmdata.asmlists[al_globals].concat(cai_align.create(const_align(sizeof(pint))));
          current_asmdata.asmlists[al_globals].concat(Tai_label.Create(p^.nl));
          len:=length(p^.data.messageinf.str^);
          current_asmdata.asmlists[al_globals].concat(tai_const.create_8bit(len));
@@ -862,9 +862,9 @@ implementation
 
          { now start writing of the message string table }
          current_asmdata.getdatalabel(result);
-         current_asmdata.asmlists[al_globals].concat(cai_align.create(const_align(sizeof(aint))));
+         current_asmdata.asmlists[al_globals].concat(cai_align.create(const_align(sizeof(pint))));
          current_asmdata.asmlists[al_globals].concat(Tai_label.Create(result));
-         current_asmdata.asmlists[al_globals].concat(Tai_const.Create_aint(count));
+         current_asmdata.asmlists[al_globals].concat(Tai_const.Create_pint(count));
          if assigned(root) then
            begin
               writestrentry(root);
@@ -899,7 +899,7 @@ implementation
 
          { now start writing of the message string table }
          current_asmdata.getdatalabel(r);
-         current_asmdata.asmlists[al_globals].concat(cai_align.create(const_align(sizeof(aint))));
+         current_asmdata.asmlists[al_globals].concat(cai_align.create(const_align(sizeof(pint))));
          current_asmdata.asmlists[al_globals].concat(Tai_label.Create(r));
          genintmsgtab:=r;
          current_asmdata.asmlists[al_globals].concat(Tai_const.Create_32bit(count));
@@ -977,7 +977,7 @@ implementation
            begin
               current_asmdata.getdatalabel(r);
               gendmt:=r;
-              al_globals.concat(cai_align.create(const_align(sizeof(aint))));
+              al_globals.concat(cai_align.create(const_align(sizeof(pint))));
               al_globals.concat(Tai_label.Create(r));
               { entries for caching }
               al_globals.concat(Tai_const.Create_ptr(0));
@@ -1032,7 +1032,7 @@ implementation
               begin
                 current_asmdata.getdatalabel(l);
 
-                current_asmdata.asmlists[al_typedconsts].concat(cai_align.create(const_align(sizeof(aint))));
+                current_asmdata.asmlists[al_typedconsts].concat(cai_align.create(const_align(sizeof(pint))));
                 current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l));
                 current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_8bit(length(tsym(p).realname)));
                 current_asmdata.asmlists[al_typedconsts].concat(Tai_string.Create(tsym(p).realname));
@@ -1059,7 +1059,7 @@ implementation
          if count>0 then
            begin
               current_asmdata.getdatalabel(l);
-              current_asmdata.asmlists[al_globals].concat(cai_align.create(const_align(sizeof(aint))));
+              current_asmdata.asmlists[al_globals].concat(cai_align.create(const_align(sizeof(pint))));
               current_asmdata.asmlists[al_globals].concat(Tai_label.Create(l));
               current_asmdata.asmlists[al_globals].concat(Tai_const.Create_32bit(count));
               _class.symtable.SymList.ForEachCall(@do_gen_published_methods,nil);
@@ -1084,7 +1084,7 @@ implementation
         current_asmdata.getdatalabel(fieldtable);
         current_asmdata.getdatalabel(classtable);
         maybe_new_object_file(current_asmdata.asmlists[al_rtti]);
-        new_section(current_asmdata.asmlists[al_rtti],sec_rodata,classtable.name,const_align(sizeof(aint)));
+        new_section(current_asmdata.asmlists[al_rtti],sec_rodata,classtable.name,const_align(sizeof(pint)));
 
         { retrieve field info fields }
         fieldcount:=0;
@@ -1116,8 +1116,8 @@ implementation
                (sp_published in tsym(sym).symoptions) then
               begin
                 if (tf_requires_proper_alignment in target_info.flags) then
-                  current_asmdata.asmlists[al_rtti].concat(cai_align.Create(sizeof(AInt)));
-                current_asmdata.asmlists[al_rtti].concat(Tai_const.Create_aint(tfieldvarsym(sym).fieldoffset));
+                  current_asmdata.asmlists[al_rtti].concat(cai_align.Create(sizeof(pint)));
+                current_asmdata.asmlists[al_rtti].concat(Tai_const.Create_pint(tfieldvarsym(sym).fieldoffset));
                 classindex:=classtablelist.IndexOf(tfieldvarsym(sym).vardef);
                 if classindex=-1 then
                   internalerror(200611033);
@@ -1128,7 +1128,7 @@ implementation
           end;
 
         { generate the class table }
-        current_asmdata.asmlists[al_rtti].concat(cai_align.create(const_align(sizeof(aint))));
+        current_asmdata.asmlists[al_rtti].concat(cai_align.create(const_align(sizeof(pint))));
         current_asmdata.asmlists[al_rtti].concat(Tai_label.Create(classtable));
         current_asmdata.asmlists[al_rtti].concat(Tai_const.Create_16bit(classtablelist.count));
         if (tf_requires_proper_alignment in target_info.flags) then
@@ -1159,7 +1159,7 @@ implementation
         i  : longint;
       begin
         vtblstr:=intf_get_vtbl_name(AImplIntf);
-        section_symbol_start(rawdata,vtblstr,AT_DATA,true,sec_data,const_align(sizeof(aint)));
+        section_symbol_start(rawdata,vtblstr,AT_DATA,true,sec_data,const_align(sizeof(pint)));
         if assigned(AImplIntf.procdefs) then
           begin
             for i:=0 to AImplIntf.procdefs.count-1 do
@@ -1186,7 +1186,7 @@ implementation
           begin
             { label for GUID }
             current_asmdata.getdatalabel(guidlabel);
-            rawdata.concat(cai_align.create(const_align(sizeof(aint))));
+            rawdata.concat(cai_align.create(const_align(sizeof(pint))));
             rawdata.concat(Tai_label.Create(guidlabel));
             with AImplIntf.IntfDef.iidguid^ do
               begin
@@ -1207,12 +1207,12 @@ implementation
         current_asmdata.asmlists[al_globals].concat(Tai_const.Createname(intf_get_vtbl_name(AImplIntf.VtblImplIntf),0));
         { IOffset field }
         if AImplIntf.VtblImplIntf.IType = etStandard then
-          current_asmdata.asmlists[al_globals].concat(Tai_const.Create_aint(AImplIntf.VtblImplIntf.IOffset))
+          current_asmdata.asmlists[al_globals].concat(Tai_const.Create_pint(AImplIntf.VtblImplIntf.IOffset))
         else
-          current_asmdata.asmlists[al_globals].concat(Tai_const.Create_aint(AImplIntf.VtblImplIntf.FieldOffset));
+          current_asmdata.asmlists[al_globals].concat(Tai_const.Create_pint(AImplIntf.VtblImplIntf.FieldOffset));
         { IIDStr }
         current_asmdata.getdatalabel(iidlabel);
-        rawdata.concat(cai_align.create(const_align(sizeof(aint))));
+        rawdata.concat(cai_align.create(const_align(sizeof(pint))));
         rawdata.concat(Tai_label.Create(iidlabel));
         rawdata.concat(Tai_const.Create_8bit(length(AImplIntf.IntfDef.iidstr^)));
         if AImplIntf.IntfDef.objecttype=odt_interfacecom then
@@ -1221,7 +1221,7 @@ implementation
           rawdata.concat(Tai_string.Create(AImplIntf.IntfDef.iidstr^));
         current_asmdata.asmlists[al_globals].concat(Tai_const.Create_sym(iidlabel));
         { IType }
-        current_asmdata.asmlists[al_globals].concat(Tai_const.Create_aint(aint(AImplIntf.VtblImplIntf.IType)));
+        current_asmdata.asmlists[al_globals].concat(Tai_const.Create_pint(aint(AImplIntf.VtblImplIntf.IType)));
       end;
 
 
@@ -1233,9 +1233,9 @@ implementation
         intftablelab : tasmlabel;
       begin
         current_asmdata.getdatalabel(intftablelab);
-        current_asmdata.asmlists[al_globals].concat(cai_align.create(const_align(sizeof(aint))));
+        current_asmdata.asmlists[al_globals].concat(cai_align.create(const_align(sizeof(pint))));
         current_asmdata.asmlists[al_globals].concat(Tai_label.Create(intftablelab));
-        current_asmdata.asmlists[al_globals].concat(Tai_const.Create_aint(_class.ImplementedInterfaces.count));
+        current_asmdata.asmlists[al_globals].concat(Tai_const.Create_pint(_class.ImplementedInterfaces.count));
         rawdata:=TAsmList.Create;
         { Write vtbls }
         for i:=0 to _class.ImplementedInterfaces.count-1 do
@@ -1267,7 +1267,7 @@ implementation
         begin
           s:=make_mangledname('IID',_class.owner,_class.objname^);
           maybe_new_object_file(current_asmdata.asmlists[al_globals]);
-          new_section(current_asmdata.asmlists[al_globals],sec_rodata,s,const_align(sizeof(aint)));
+          new_section(current_asmdata.asmlists[al_globals],sec_rodata,s,const_align(sizeof(pint)));
           current_asmdata.asmlists[al_globals].concat(Tai_symbol.Createname_global(s,AT_DATA,0));
           current_asmdata.asmlists[al_globals].concat(Tai_const.Create_32bit(longint(_class.iidguid^.D1)));
           current_asmdata.asmlists[al_globals].concat(Tai_const.Create_16bit(_class.iidguid^.D2));
@@ -1308,7 +1308,7 @@ implementation
              procname:=pd.mangledname;
            List.concat(Tai_const.createname(procname,0));
 {$ifdef vtentry}
-           hs:='VTENTRY'+'_'+_class.vmt_mangledname+'$$'+tostr(_class.vmtmethodoffset(i) div sizeof(aint));
+           hs:='VTENTRY'+'_'+_class.vmt_mangledname+'$$'+tostr(_class.vmtmethodoffset(i) div sizeof(pint));
            current_asmdata.asmlists[al_globals].concat(tai_symbol.CreateName(hs,AT_DATA,0));
 {$endif vtentry}
          end;
@@ -1341,7 +1341,7 @@ implementation
           begin
             current_asmdata.getdatalabel(classnamelabel);
             maybe_new_object_file(current_asmdata.asmlists[al_globals]);
-            new_section(current_asmdata.asmlists[al_globals],sec_rodata,classnamelabel.name,const_align(sizeof(aint)));
+            new_section(current_asmdata.asmlists[al_globals],sec_rodata,classnamelabel.name,const_align(sizeof(pint)));
 
             { interface table }
             if _class.ImplementedInterfaces.count>0 then
@@ -1363,7 +1363,7 @@ implementation
 
         { write debug info }
         maybe_new_object_file(current_asmdata.asmlists[al_globals]);
-        new_section(current_asmdata.asmlists[al_globals],sec_rodata,_class.vmt_mangledname,const_align(sizeof(aint)));
+        new_section(current_asmdata.asmlists[al_globals],sec_rodata,_class.vmt_mangledname,const_align(sizeof(pint)));
         current_asmdata.asmlists[al_globals].concat(Tai_symbol.Createname_global(_class.vmt_mangledname,AT_DATA,0));
 
          { determine the size with symtable.datasize, because }

compiler/ogbase.pas

@@ -898,7 +898,7 @@ implementation
           sec_idata2,sec_idata4,sec_idata5,sec_idata6,sec_idata7:
             result:=4;
           else
-            result:=sizeof(aint);
+            result:=sizeof(pint);
         end;
       end;
 
@@ -1244,7 +1244,7 @@ implementation
         vtblentryoffset : aint;
       begin
         CheckIdx(VTableIdx);
-        vtblentryoffset:=ExeSymbol.ObjSymbol.Offset+VTableIdx*sizeof(aint);
+        vtblentryoffset:=ExeSymbol.ObjSymbol.Offset+VTableIdx*sizeof(pint);
         { Find and disable relocation }
         for i:=0 to ExeSymbol.ObjSymbol.ObjSection.ObjRelocations.Count-1 do
           begin
@@ -1266,7 +1266,7 @@ implementation
       begin
         if EntryCnt<>0 then
           internalerror(200603313);
-        EntryCnt:=ASize div sizeof(aint);
+        EntryCnt:=ASize div sizeof(pint);
         EntryArray:=AllocMem(EntryCnt*sizeof(TVTableEntry));
       end;
 

compiler/ogcoff.pas

@@ -717,7 +717,7 @@ const pemagic : array[0..3] of byte = (
         alignflag : longword;
       begin
         aoptions:=[];
-        aalign:=sizeof(aint);
+        aalign:=sizeof(pint);
         if flags and PE_SCN_CNT_CODE<>0 then
           include(aoptions,oso_executable);
         if flags and PE_SCN_MEM_DISCARDABLE<>0 then
@@ -1817,7 +1817,7 @@ const pemagic : array[0..3] of byte = (
                else
                  begin
                    djdecodesechdrflags(secname,sechdr.flags);
-                   secalign:=sizeof(aint);
+                   secalign:=sizeof(pint);
                  end;
                if (Length(secname)>3) and (secname[2] in ['e','f','i','p','r']) then
                  begin

compiler/ogelf.pas

@@ -308,17 +308,17 @@ implementation
         end;
 
 
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
         telfheader = telf64header;
         telfreloc = telf64reloc;
         telfsymbol = telf64symbol;
         telfsechdr = telf64sechdr;
-{$else cpu64bit}
+{$else cpu64bitaddr}
         telfheader = telf32header;
         telfreloc = telf32reloc;
         telfsymbol = telf32symbol;
         telfsechdr = telf32sechdr;
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
 
 
       function MayBeSwapHeader(h : telf32header) : telf32header;
@@ -796,11 +796,11 @@ implementation
                    else
                      relsym:=SHN_UNDEF;
                  end;
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
                rel.info:=(qword(relsym) shl 32) or reltyp;
-{$else cpu64bit}
+{$else cpu64bitaddr}
                rel.info:=(relsym shl 8) or reltyp;
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                { write reloc }
                relocsect.write(MaybeSwapElfReloc(rel),sizeof(rel));
              end;
@@ -1049,11 +1049,11 @@ implementation
            { Write ELF Header }
            fillchar(header,sizeof(header),0);
            header.magic0123:=$464c457f; { = #127'ELF' }
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
            header.file_class:=2;
-{$else cpu64bit}
+{$else cpu64bitaddr}
            header.file_class:=1;
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
            if target_info.endian=endian_big then
              header.data_encoding:=2
            else

compiler/ogmap.pas

@@ -121,7 +121,7 @@ implementation
        begin
          FImageBase:=abase;
          if FImageBase<>0 then
-           imagebasestr:=' (ImageBase='+HexStr(FImageBase,sizeof(aint)*2)+')'
+           imagebasestr:=' (ImageBase='+HexStr(FImageBase,sizeof(pint)*2)+')'
          else
            imagebasestr:='';
          AddHeader('Memory map'+imagebasestr);
@@ -132,8 +132,8 @@ implementation
      procedure TExeMap.AddMemoryMapExeSection(p:texesection);
        begin
          { .text           0x000018a8     0xd958 }
-         Add(PadSpace(p.name,19)+PadSpace(' 0x'+HexStr(p.mempos+Fimagebase,sizeof(aint)*2),12)+
-             ' 0x'+HexStr(p.size,sizeof(aint)));
+         Add(PadSpace(p.name,19)+PadSpace(' 0x'+HexStr(p.mempos+Fimagebase,sizeof(pint)*2),12)+
+             ' 0x'+HexStr(p.size,sizeof(pint)));
        end;
 
 
@@ -148,15 +148,15 @@ implementation
              Add(' '+secname);
              secname:='';
            end;
-         Add(' '+PadSpace(secname,18)+PadSpace(' 0x'+HexStr(p.mempos+FImageBase,sizeof(aint)*2),12)+
-             ' 0x'+HexStr(p.size,sizeof(aint))+' '+p.objdata.name);
+         Add(' '+PadSpace(secname,18)+PadSpace(' 0x'+HexStr(p.mempos+FImageBase,sizeof(pint)*2),12)+
+             ' 0x'+HexStr(p.size,sizeof(pint))+' '+p.objdata.name);
        end;
 
 
      procedure TExeMap.AddMemoryMapSymbol(p:TObjSymbol);
        begin
          {                 0x00001e30                setup_screens }
-         Add(Space(20)+PadSpace('0x'+HexStr(p.address+Fimagebase,sizeof(aint)*2),25)+' '+p.name);
+         Add(Space(20)+PadSpace('0x'+HexStr(p.address+Fimagebase,sizeof(pint)*2),25)+' '+p.name);
        end;
 
 end.

compiler/parabase.pas

@@ -205,7 +205,7 @@ implementation
         case location^.loc of
           LOC_REGISTER :
             begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
               if size in [OS_64,OS_S64] then
                 begin
                   if not assigned(location^.next) then

compiler/paramgr.pas

@@ -166,12 +166,12 @@ implementation
         case varspez of
           vs_out,
           vs_var :
-            push_size:=sizeof(aint);
+            push_size:=sizeof(pint);
           vs_value,
           vs_const :
             begin
                 if push_addr_param(varspez,def,calloption) then
-                  push_size:=sizeof(aint)
+                  push_size:=sizeof(pint)
                 else
                   begin
                     { special array are normally pushed by addr, only for
@@ -326,7 +326,7 @@ implementation
               i386 isn't affected anyways because it uses the stack to push parameters
               on arm it reduces executable size of the compiler by 2.1 per cent (FK) }
             { Does it fit a register? }
-            if (len<=sizeof(aint)) and
+            if (len<=sizeof(pint)) and
                (cgpara.size in [OS_8,OS_16,OS_32,OS_64,OS_128,OS_S8,OS_S16,OS_S32,OS_S64,OS_S128]) then
               newparaloc^.loc:=LOC_REGISTER
             else

compiler/pdecobj.pas

@@ -84,11 +84,11 @@ implementation
            if is_class(pd._class) then
              pd.returndef:=pd._class
            else
-{$ifdef CPU64bit}
+{$ifdef CPU64bitaddr}
              pd.returndef:=bool64type;
-{$else CPU64bit}
+{$else CPU64bitaddr}
              pd.returndef:=bool32type;
-{$endif CPU64bit}
+{$endif CPU64bitaddr}
            constructor_head:=pd;
         end;
 

compiler/pdecsub.pas

@@ -1039,11 +1039,11 @@ implementation
                   if is_class(pd._class) then
                     pd.returndef:=pd._class
                   else
-{$ifdef CPU64bit}
+{$ifdef CPU64bitaddr}
                     pd.returndef:=bool64type;
-{$else CPU64bit}
+{$else CPU64bitaddr}
                     pd.returndef:=bool32type;
-{$endif CPU64bit}
+{$endif CPU64bitaddr}
                 end;
             end;
 

compiler/pdecvar.pas

@@ -345,9 +345,9 @@ implementation
                      procedure matching requires equal parameters }
                    if is_constnode(pt) and
                       is_ordinal(pt.resultdef)
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
                       and (not is_64bitint(pt.resultdef))
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                       then
                      begin
                        if is_integer(pt.resultdef) then
@@ -567,9 +567,9 @@ implementation
          if try_to_consume(_DEFAULT) then
            begin
               if not(is_ordinal(p.propdef) or
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
                      is_64bitint(p.propdef) or
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                      is_class(p.propdef) or
                      is_single(p.propdef) or
                      (p.propdef.typ in [classrefdef,pointerdef]) or
@@ -1375,9 +1375,9 @@ implementation
                   recst.addfield(fieldvs);
                 end;
               if not(is_ordinal(casetype))
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
                  or is_64bitint(casetype)
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                  then
                 Message(type_e_ordinal_expr_expected);
               consume(_OF);

compiler/pexpr.pas

@@ -340,7 +340,7 @@ implementation
              typecheckpass(p1);
              result:=internalstatements(newstatement);
              hdef:=tpointerdef.create(p1.resultdef);
-             temp:=ctempcreatenode.create(hdef,sizeof(aint),tt_persistent,false);
+             temp:=ctempcreatenode.create(hdef,sizeof(pint),tt_persistent,false);
              addstatement(newstatement,temp);
              addstatement(newstatement,cassignmentnode.create(ctemprefnode.create(temp),caddrnode.create_internal(p1)));
              addstatement(newstatement,cassignmentnode.create(

compiler/pmodules.pas

@@ -175,7 +175,7 @@ implementation
         ltvTables.insert(Tai_const.Create_32bit(count));
         { insert in data segment }
         maybe_new_object_file(current_asmdata.asmlists[al_globals]);
-        new_section(current_asmdata.asmlists[al_globals],sec_data,'FPC_THREADVARTABLES',sizeof(aint));
+        new_section(current_asmdata.asmlists[al_globals],sec_data,'FPC_THREADVARTABLES',sizeof(pint));
         current_asmdata.asmlists[al_globals].concat(Tai_symbol.Createname_global('FPC_THREADVARTABLES',AT_DATA,0));
         current_asmdata.asmlists[al_globals].concatlist(ltvTables);
         current_asmdata.asmlists[al_globals].concat(Tai_symbol_end.Createname('FPC_THREADVARTABLES'));
@@ -216,7 +216,7 @@ implementation
             ltvTable.concat(tai_const.create_sym(nil));
             { add to datasegment }
             maybe_new_object_file(current_asmdata.asmlists[al_globals]);
-            new_section(current_asmdata.asmlists[al_globals],sec_data,s,sizeof(aint));
+            new_section(current_asmdata.asmlists[al_globals],sec_data,s,sizeof(pint));
             current_asmdata.asmlists[al_globals].concat(Tai_symbol.Createname_global(s,AT_DATA,0));
             current_asmdata.asmlists[al_globals].concatlist(ltvTable);
             current_asmdata.asmlists[al_globals].concat(Tai_symbol_end.Createname(s));
@@ -294,10 +294,10 @@ implementation
             hp:=tmodule(hp.next);
           end;
         { Insert TableCount at start }
-        ResourceStringTables.insert(Tai_const.Create_aint(count));
+        ResourceStringTables.insert(Tai_const.Create_pint(count));
         { Add to data segment }
         maybe_new_object_file(current_asmdata.AsmLists[al_globals]);
-        new_section(current_asmdata.AsmLists[al_globals],sec_data,'FPC_RESOURCESTRINGTABLES',sizeof(aint));
+        new_section(current_asmdata.AsmLists[al_globals],sec_data,'FPC_RESOURCESTRINGTABLES',sizeof(pint));
         current_asmdata.AsmLists[al_globals].concat(Tai_symbol.Createname_global('FPC_RESOURCESTRINGTABLES',AT_DATA,0));
         current_asmdata.AsmLists[al_globals].concatlist(ResourceStringTables);
         current_asmdata.AsmLists[al_globals].concat(Tai_symbol_end.Createname('FPC_RESOURCESTRINGTABLES'));
@@ -349,7 +349,7 @@ implementation
         unitinits.insert(Tai_const.Create_32bit(count));
         { Add to data segment }
         maybe_new_object_file(current_asmdata.asmlists[al_globals]);
-        new_section(current_asmdata.asmlists[al_globals],sec_data,'INITFINAL',sizeof(aint));
+        new_section(current_asmdata.asmlists[al_globals],sec_data,'INITFINAL',sizeof(pint));
         current_asmdata.asmlists[al_globals].concat(Tai_symbol.Createname_global('INITFINAL',AT_DATA,0));
         current_asmdata.asmlists[al_globals].concatlist(unitinits);
         current_asmdata.asmlists[al_globals].concat(Tai_symbol_end.Createname('INITFINAL'));
@@ -372,9 +372,9 @@ implementation
         if not(tf_no_generic_stackcheck in target_info.flags) then
           begin
             { stacksize can be specified and is now simulated }
-            new_section(current_asmdata.asmlists[al_globals],sec_data,'__stklen', sizeof(aint));
-            current_asmdata.asmlists[al_globals].concat(Tai_symbol.Createname_global('__stklen',AT_DATA,sizeof(aint)));
-            current_asmdata.asmlists[al_globals].concat(Tai_const.Create_aint(stacksize));
+            new_section(current_asmdata.asmlists[al_globals],sec_data,'__stklen', sizeof(pint));
+            current_asmdata.asmlists[al_globals].concat(Tai_symbol.Createname_global('__stklen',AT_DATA,sizeof(pint)));
+            current_asmdata.asmlists[al_globals].concat(Tai_const.Create_pint(stacksize));
           end;
 {$IFDEF POWERPC}
         { AmigaOS4 "stack cookie" support }
@@ -393,9 +393,9 @@ implementation
 {$ENDIF POWERPC}
         { Initial heapsize }
         maybe_new_object_file(current_asmdata.asmlists[al_globals]);
-        new_section(current_asmdata.asmlists[al_globals],sec_data,'__heapsize',sizeof(aint));
-        current_asmdata.asmlists[al_globals].concat(Tai_symbol.Createname_global('__heapsize',AT_DATA,sizeof(aint)));
-        current_asmdata.asmlists[al_globals].concat(Tai_const.Create_aint(heapsize));
+        new_section(current_asmdata.asmlists[al_globals],sec_data,'__heapsize',sizeof(pint));
+        current_asmdata.asmlists[al_globals].concat(Tai_symbol.Createname_global('__heapsize',AT_DATA,sizeof(pint)));
+        current_asmdata.asmlists[al_globals].concat(Tai_const.Create_pint(heapsize));
         { Initial heapsize }
         maybe_new_object_file(current_asmdata.asmlists[al_globals]);
         new_section(current_asmdata.asmlists[al_globals],sec_data,'__fpc_valgrind',sizeof(boolean));

compiler/powerpc/cgcpu.pas

@@ -199,7 +199,7 @@ const
             case location^.loc of
               LOC_REGISTER,LOC_CREGISTER:
                 begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
                   if (sizeleft <> 3) then
                     begin
                       a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
@@ -215,9 +215,9 @@ const
                       a_reg_dealloc(list,NR_R0);
                       dec(tmpref.offset,2);
                     end;
-{$else not cpu64bit}
+{$else not cpu64bitaddr}
 {$error add 64 bit support for non power of 2 loads in a_param_ref}
-{$endif not cpu64bit}
+{$endif not cpu64bitaddr}
                 end;
               LOC_REFERENCE:
                 begin
@@ -396,7 +396,9 @@ const
      procedure tcgppc.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
 
        begin
-         if (sreg.bitlen <> sizeof(aint)*8) then
+         if (sreg.bitlen > 32) then
+           internalerror(2008020701);
+         if (sreg.bitlen <> 32) then
            begin
              list.concat(taicpu.op_reg_reg_const_const_const(A_RLWINM,destreg,
                sreg.subsetreg,(32-sreg.startbit) and 31,32-sreg.bitlen,31));
@@ -423,7 +425,9 @@ const
        begin
          if (slopt in [SL_SETZERO,SL_SETMAX]) then
            inherited a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,slopt)
-         else if (sreg.bitlen <> sizeof(aint) * 8) then
+         else if (sreg.bitlen>32) then
+           internalerror(2008020702)
+         else if (sreg.bitlen <> 32) then
            list.concat(taicpu.op_reg_reg_const_const_const(A_RLWIMI,sreg.subsetreg,fromreg,
              sreg.startbit,32-sreg.startbit-sreg.bitlen,31-sreg.startbit))
          else
@@ -434,6 +438,8 @@ const
        procedure tcgppc.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize: tcgsize; const fromsreg, tosreg: tsubsetregister);
 
          begin
+           if (tosreg.bitlen>32) or (tosreg.startbit>31) then
+             internalerror(2008020703);
            if (fromsreg.bitlen >= tosreg.bitlen) then
              list.concat(taicpu.op_reg_reg_const_const_const(A_RLWIMI,tosreg.subsetreg, fromsreg.subsetreg,
                 (tosreg.startbit-fromsreg.startbit) and 31,
@@ -962,7 +968,8 @@ const
                { with RS_R30 it's also already smaller, but too big a speed trade-off to make }
                 (firstregint <= RS_R29)) then
               begin
-                dec(href.offset,(RS_R31-firstregint)*sizeof(aint));
+                {$warning TODO: 64 bit support }
+                dec(href.offset,(RS_R31-firstregint)*sizeof(pint));
                 list.concat(taicpu.op_reg_ref(A_STMW,newreg(R_INTREGISTER,firstregint,R_SUBNONE),href));
               end
             else
@@ -1077,7 +1084,8 @@ const
                 { with RS_R30 it's also already smaller, but too big a speed trade-off to make }
                 (firstregint <= RS_R29)) then
               begin
-                dec(href.offset,(RS_R31-firstregint)*sizeof(aint));
+                {$warning TODO: 64 bit support }
+                dec(href.offset,(RS_R31-firstregint)*sizeof(pint));
                 list.concat(taicpu.op_reg_ref(A_LMW,newreg(R_INTREGISTER,firstregint,R_SUBNONE),href));
               end
             else

compiler/powerpc/cpupara.pas

@@ -83,8 +83,8 @@ unit cpupara;
         paraloc : pcgparalocation;
       begin
         cgpara.reset;
-        cgpara.size:=OS_INT;
-        cgpara.intsize:=tcgsize2size[OS_INT];
+        cgpara.size:=OS_ADDR;
+        cgpara.intsize:=sizeof(pint);
         cgpara.alignment:=get_para_align(calloption);
         paraloc:=cgpara.add_location;
         with paraloc^ do
@@ -102,9 +102,9 @@ unit cpupara;
                loc:=LOC_REFERENCE;
                paraloc^.reference.index:=NR_STACK_POINTER_REG;
                if (target_info.abi <> abi_powerpc_aix) then
-                 reference.offset:=sizeof(aint)*(nr-8)
+                 reference.offset:=sizeof(pint)*(nr-8)
                else
-                 reference.offset:=sizeof(aint)*(nr);
+                 reference.offset:=sizeof(pint)*(nr);
              end;
           end;
       end;
@@ -258,7 +258,7 @@ unit cpupara;
         else
          { Return in register }
           begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
             if retcgsize in [OS_64,OS_S64] then
              begin
                { low 32bits }
@@ -274,7 +274,7 @@ unit cpupara;
                  p.funcretloc[side].register64.reglo:=NR_FUNCTION_RETURN64_LOW_REG;
              end
             else
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
              begin
                p.funcretloc[side].loc:=LOC_REGISTER;
                p.funcretloc[side].size:=retcgsize;
@@ -426,12 +426,12 @@ unit cpupara;
               if (target_info.abi = abi_powerpc_aix) and
                  (paradef.typ in [recorddef,arraydef]) then
                 hp.paraloc[side].composite:=true;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
               if (target_info.abi=abi_powerpc_sysv) and
                  is_64bit(paradef) and
                  odd(nextintreg-RS_R3) then
                 inc(nextintreg);
-{$endif not cpu64bit}
+{$endif not cpu64bitaddr}
               if (paralen = 0) then
                 if (paradef.typ = recorddef) then
                   begin
@@ -472,7 +472,7 @@ unit cpupara;
                       { if nextfpureg > maxfpureg, all intregs are already used, since there }
                       { are less of those available for parameter passing in the AIX abi     }
                       if target_info.abi=abi_powerpc_aix then
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
                         if (paracgsize = OS_F32) then
                           begin
                             inc(stack_offset,4);
@@ -487,13 +487,13 @@ unit cpupara;
                             else
                               nextintreg := RS_R11;
                           end;
-{$else not cpu64bit}
+{$else not cpu64bitaddr}
                           begin
                             inc(stack_offset,tcgsize2size[paracgsize]);
                             if (nextintreg < RS_R11) then
                               inc(nextintreg);
                           end;
-{$endif not cpu64bit}
+{$endif not cpu64bitaddr}
                     end
                   else { LOC_REFERENCE }
                     begin
@@ -526,7 +526,7 @@ unit cpupara;
                              (nextintreg < RS_R11) do
                           begin
                             inc(nextintreg);
-                            dec(paralen,sizeof(aint));
+                            dec(paralen,sizeof(pint));
                           end;
                        paralen := 0;
                     end;

compiler/powerpc64/cgcpu.pas

@@ -470,9 +470,9 @@ begin
                 adjusttail := true;
               end;
             end;
-            if (adjusttail) and (sizeleft < tcgsize2size[OS_INT]) then
+            if (adjusttail) and (sizeleft < sizeof(pint)) then
               a_op_const_reg(list, OP_SHL, OS_INT,
-                (tcgsize2size[OS_INT] - sizeleft) * tcgsize2size[OS_INT],
+                (sizeof(pint) - sizeleft) * sizeof(pint),
                 location^.register);
           end;
         end;
@@ -754,7 +754,7 @@ begin
     ((tcgsize2size[fromsize] = tcgsize2size[tosize]) and (fromsize <> tosize)) or
     { do we need to mask out the sign when loading from smaller signed to larger unsigned type? }
     ( is_signed_cgsize(fromsize) and (not is_signed_cgsize(tosize)) and
-      (tcgsize2size[fromsize] < tcgsize2size[tosize]) and (tcgsize2size[tosize] <> tcgsize2size[OS_INT]) ) then begin
+      (tcgsize2size[fromsize] < tcgsize2size[tosize]) and (tcgsize2size[tosize] <> sizeof(pint)) ) then begin
     case tosize of
       OS_S8:
         instr := taicpu.op_reg_reg(A_EXTSB,reg2,reg1);
@@ -1388,7 +1388,7 @@ var
         for regcount := RS_R31 downto firstreggpr do begin
           a_load_reg_ref(list, OS_INT, OS_INT, newreg(R_INTREGISTER, regcount,
             R_SUBNONE), href);
-          dec(href.offset, tcgsize2size[OS_INT]);
+          dec(href.offset, sizeof(pint));
         end;
       { VMX registers not supported by FPC atm }
 
@@ -1526,7 +1526,7 @@ var
         for regcount := RS_R31 downto firstreggpr do begin
           a_load_ref_reg(list, OS_INT, OS_INT, href, newreg(R_INTREGISTER, regcount,
             R_SUBNONE));
-          dec(href.offset, tcgsize2size[OS_INT]);
+          dec(href.offset, sizeof(pint));
         end;
 
       { VMX not supported by FPC atm }

compiler/powerpc64/cpupara.pas

@@ -85,8 +85,8 @@ var
   paraloc: pcgparalocation;
 begin
   cgpara.reset;
-  cgpara.size := OS_INT;
-  cgpara.intsize := tcgsize2size[OS_INT];
+  cgpara.size := OS_ADDR;
+  cgpara.intsize := sizeof(pint);
   cgpara.alignment := get_para_align(calloption);
   paraloc := cgpara.add_location;
   with paraloc^ do begin
@@ -392,7 +392,7 @@ begin
         inc(nextintreg);
         dec(paralen, tcgsize2size[paraloc^.size]);
 
-        inc(stack_offset, tcgsize2size[OS_INT]);
+        inc(stack_offset, sizeof(pint));
       end else if (loc = LOC_FPUREGISTER) and
         (nextfloatreg <= RS_F13) then begin
         paraloc^.loc := loc;

compiler/powerpc64/cpupi.pas

@@ -98,7 +98,7 @@ begin
   { more or less copied from cgcpu.pas/g_stackframe_entry }
   if not (po_assembler in procdef.procoptions) then begin
     // no VMX support
-    result := align(numgpr * tcgsize2size[OS_INT] +
+    result := align(numgpr * sizeof(pint) +
         numfpr * tcgsize2size[OS_FLOAT], ELF_STACK_ALIGN);
 
     if (pi_do_call in flags) or (tg.lasttemp <> tg.firsttemp) or

compiler/pp.pas

@@ -45,7 +45,9 @@ program pp;
   cpuflags            The target processor has status flags (on by default)
   cpufpemu            The target compiler will also support emitting software
                        floating point operations
-  cpu64bit            The target is a 64-bit processor
+  cpu64bitaddr        Generate code for a 64-bit address space
+  cpu64bitalu         The target cpu has 64-bit registers and a 64 bit alu
+                      (required for cpu64bitaddr; optional with 32 bit addr space)
   -----------------------------------------------------------------
 
   Required switches for a i386 compiler be compiled by Free Pascal Compiler:

compiler/ppcgen/aasmcpu.pas

@@ -399,18 +399,18 @@ uses cutils, cclasses;
           A_DCBA, A_DCBI, A_DCBST, A_DCBT, A_DCBTST, A_DCBZ, A_DCBF, A_ICBI,
           A_ECOWX, A_FCMPO, A_FCMPU, A_MTMSR, A_TLBIE, A_TW, A_TWI,
           A_CMPWI, A_CMPW, A_CMPLWI, A_CMPLW, A_MT, A_MTLR, A_MTCTR
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
           , A_STDU, A_STDUX,
           A_STD, A_STDX,
           A_STDCX_,
           A_CMPD, A_CMPDI, A_CMPLD, A_CMPLDI,
           A_MFXER
-{$endif cpu64bit}
+{$endif cpu64bitalu}
             : ;
           A_RLWIMI, A_RLWIMI_
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
           , A_INSRDI, A_INSRDI_, A_RLDIMI
-{$endif not cpu64bit}
+{$endif not cpu64bitalu}
           :
             if opnr = 0 then
               result := operand_readwrite;
@@ -426,9 +426,9 @@ uses cutils, cclasses;
         result := operand_read;
         case opcode of
           A_STBU, A_STBUX, A_STHU, A_STHUX, A_STWU, A_STWUX, 
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
           A_STDU, A_STDUX,
-{$endif cpu64bit}
+{$endif cpu64bitalu}
           A_STFSU, A_STFSUX, A_STFDU, A_STFDUX:
             if (oper[opnr]^.ref^.base = reg) then
               result := operand_readwrite;
@@ -440,11 +440,11 @@ uses cutils, cclasses;
       begin
         case getregtype(r) of
           R_INTREGISTER:
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
             result:=taicpu.op_reg_ref(A_LD,r,ref);
-{$else cpu64bit}
+{$else cpu64bitalu}
             result:=taicpu.op_reg_ref(A_LWZ,r,ref);
-{$endif cpu64bit}
+{$endif cpu64bitalu}
           R_FPUREGISTER:
             result:=taicpu.op_reg_ref(A_LFD,r,ref);
           else
@@ -457,11 +457,11 @@ uses cutils, cclasses;
       begin
         case getregtype(r) of
           R_INTREGISTER:
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
             result:=taicpu.op_reg_ref(A_STD,r,ref);
-{$else cpu64bit}
+{$else cpu64bitalu}
             result:=taicpu.op_reg_ref(A_STW,r,ref);
-{$endif cpu64bit}
+{$endif cpu64bitalu}
           R_FPUREGISTER:
             result:=taicpu.op_reg_ref(A_STFD,r,ref);
           else

compiler/ppcgen/agppcgas.pas

@@ -69,17 +69,17 @@ unit agppcgas;
        itcpugas,cpuinfo,
        aasmcpu;
 
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
     const
       refaddr2str: array[trefaddr] of string[9] = ('', '', '', '@l', '@h', '@higher', '@highest', '@ha', '@highera', '@highesta');
       verbose_refaddrs = [addr_low, addr_high, addr_higher, addr_highest, addr_higha, addr_highera, addr_highesta];
       refaddr2str_darwin: array[trefaddr] of string[4] = ('','','','lo16', 'hi16', '@err', '@err', 'ha16', '@err', '@err');
-{$else cpu64bit}
+{$else cpu64bitaddr}
     const
       refaddr2str: array[trefaddr] of string[3] = ('','','','@l','@h','@ha');
       refaddr2str_darwin: array[trefaddr] of string[4] = ('','','','lo16','hi16','ha16');
       verbose_refaddrs = [addr_low,addr_high,addr_higha];
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
 
 
     function getreferencestring(var ref : treference) : string;
@@ -124,13 +124,13 @@ unit agppcgas;
                if not(target_info.system in [system_powerpc_darwin,system_powerpc64_darwin]) then
                  s := s+refaddr2str[refaddr];
              end;
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
            if (refaddr = addr_pic) then
 	     if (target_info.system <> system_powerpc64_linux) then
 	       s := s + ')'
 	     else
 	       s := s + ')@got';
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
 
            if (index=NR_NO) and (base<>NR_NO) then
              begin
@@ -391,9 +391,9 @@ unit agppcgas;
     function TPPCAppleGNUAssembler.MakeCmdLine: TCmdStr;
       begin
         result := inherited MakeCmdLine;
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
         Replace(result,'$ARCH','ppc64')
-{$else cpu64bit}
+{$else cpu64bitaddr}
         case current_settings.cputype of
           cpu_PPC7400:
             Replace(result,'$ARCH','ppc7400');
@@ -402,7 +402,7 @@ unit agppcgas;
           else
             Replace(result,'$ARCH','ppc')
         end;
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
       end;
 
 
@@ -420,11 +420,11 @@ unit agppcgas;
 
          idtxt  : 'AS';
          asmbin : 'as';
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
          asmcmd : '-a64 -o $OBJ $ASM';
-{$else cpu64bit}
+{$else cpu64bitaddr}
          asmcmd: '-o $OBJ $ASM';
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
          supported_target : system_any;
          flags : [af_allowdirect,af_needar,af_smartlink_sections];
          labelprefix : '.L';

compiler/ppcgen/cgppc.pas

@@ -298,12 +298,12 @@ unit cgppc;
           current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_ref(A_LIS,NR_R11,href));
         href.refaddr := addr_low;
         href.base := NR_R11;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
         current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_ref(A_LWZU,NR_R12,href));
-{$else cpu64bit}
+{$else cpu64bitaddr}
         { darwin/ppc64 uses a 32 bit absolute address here, strange... }
         current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_ref(A_LDU,NR_R12,href));
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
         current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MTCTR,NR_R12));
         current_asmdata.asmlists[al_imports].concat(taicpu.op_none(A_BCTR));
         current_asmdata.asmlists[al_imports].concat(tai_directive.create(asd_lazy_symbol_pointer,''));
@@ -425,10 +425,10 @@ unit cgppc;
       (((A_STB, A_STBU), (A_STBX, A_STBUX)),
         ((A_STH, A_STHU), (A_STHX, A_STHUX)),
         ((A_STW, A_STWU), (A_STWX, A_STWUX))
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
         ,
         ((A_STD, A_STDU), (A_STDX, A_STDUX))
-{$endif cpu64bit}
+{$endif cpu64bitalu}
         );
     var
       ref2: TReference;
@@ -778,11 +778,11 @@ unit cgppc;
       {$ENDIF EXTDEBUG}
     //  cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
       
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
       list.concat(taicpu.op_reg_ref(A_LD, result, ref));
-{$else cpu64bit}
+{$else cpu64bitaddr}
       list.concat(taicpu.op_reg_ref(A_LWZ, result, ref));
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
     end;
     
     

compiler/ppcgen/ngppcadd.pas

@@ -125,10 +125,10 @@ implementation
         if not(cmpop) then
           begin
             location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
             if is_64bit(resultdef) then
               location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
          end;
       end;
 

compiler/ppcgen/ngppccnv.pas

@@ -70,9 +70,9 @@ implementation
       var
         hreg1,
         hreg2    : tregister;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
         href     : treference;
-{$endif not cpu64bit}
+{$endif not cpu64bitalu}
         resflags : tresflags;
         opsize   : tcgsize;
         hlabel, oldTrueLabel, oldFalseLabel : tasmlabel;
@@ -108,17 +108,17 @@ implementation
 
          location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
          opsize := def_cgsize(left.resultdef);
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          if (opsize in [OS_64,OS_S64]) then
            opsize:=OS_32;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
          case left.location.loc of
             LOC_CREFERENCE,LOC_REFERENCE,LOC_REGISTER,LOC_CREGISTER :
               begin
                 if left.location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
                   begin
                     hreg1:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                     if left.location.size in [OS_64,OS_S64] then
                       begin
                         cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,left.location.reference,hreg1);
@@ -129,19 +129,19 @@ implementation
                         cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,hreg1,hreg2,hreg1);
                       end
                     else
-{$endif not cpu64bit}
+{$endif not cpu64bitalu}
                       cg.a_load_ref_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.reference,hreg1);
                   end
                 else
                   begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                      if left.location.size in [OS_64,OS_S64] then
                        begin
                           hreg1:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
                           cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,left.location.register64.reglo,hreg1);
                        end
                      else
-{$endif not cpu64bit}
+{$endif not cpu64bitalu}
                        hreg1 := left.location.register;
                   end;
                 hreg2 := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
@@ -186,7 +186,7 @@ implementation
             else
               internalerror(10062);
          end;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          if (location.size in [OS_64,OS_S64]) then
            begin
              location.register64.reglo:=hreg1;
@@ -199,7 +199,7 @@ implementation
                cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
            end
          else
-{$endif cpu64bit}
+{$endif cpu64bitalu}
            location.register:=hreg1;
 
          current_procinfo.CurrTrueLabel:=oldTrueLabel;

compiler/ppcgen/rgcpu.pas

@@ -165,12 +165,12 @@ unit rgcpu;
               A_STHBRX, A_LHBRX, A_STWBRX, A_LWBRX, A_STWCX_, A_LWARX,
               A_ECIWX, A_ECOWX,
               A_LMW, A_STMW,A_LSWI,A_LSWX,A_STSWI,A_STSWX
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
               , A_STD, A_STDX,
               A_LD, A_LDX,
               A_LWA, A_LWAX,
               A_STDCX_,A_LDARX
-{$endif cpu64bit}
+{$endif cpu64bitalu}
                 :
                 begin
                   case taicpu(p).oper[1]^.typ of

compiler/ppu.pas

@@ -652,11 +652,11 @@ end;
 
 function tppufile.getaint:aint;
 begin
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
   result:=getint64;
-{$else cpu64bit}
+{$else cpu64bitalu}
   result:=getlongint;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
 end;
 
 

compiler/pstatmnt.pas

@@ -283,7 +283,7 @@ implementation
 
         procedure check_range(hp:tnode);
         begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
           if hp.nodetype=ordconstn then
             begin
               if (tordconstnode(hp).value<int64(low(longint))) or
@@ -294,7 +294,7 @@ implementation
                   tordconstnode(hp).value:=0;
                 end;
             end;
-{$endif cpu64bit}
+{$endif not cpu64bitaddr}
         end;
 
       var
@@ -316,9 +316,9 @@ implementation
 
          { variable must be an ordinal, int64 is not allowed for 32bit targets }
          if not(is_ordinal(hloopvar.resultdef))
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
             or is_64bitint(hloopvar.resultdef)
-{$endif cpu64bit}
+{$endif not cpu64bitaddr}
             then
            MessagePos(hloopvar.fileinfo,type_e_ordinal_expr_expected);
 
@@ -536,7 +536,7 @@ implementation
                 else
                   hdef:=tpointerdef.create(p.resultdef);
                 { load address of the value in a temp }
-                tempnode:=ctempcreatenode.create_withnode(hdef,sizeof(aint),tt_persistent,true,p);
+                tempnode:=ctempcreatenode.create_withnode(hdef,sizeof(pint),tt_persistent,true,p);
                 typecheckpass(tempnode);
                 valuenode:=p;
                 refnode:=ctemprefnode.create(tempnode);

compiler/psystem.pas

@@ -197,12 +197,12 @@ implementation
         s80floattype:=tfloatdef.create(s80real);
         s64currencytype:=torddef.create(scurrency,low(int64),high(int64));
 {$endif avr}
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
         uinttype:=u64inttype;
         sinttype:=s64inttype;
         ptruinttype:=u64inttype;
         ptrsinttype:=s64inttype;
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
 {$ifdef cpu32bit}
         uinttype:=u32inttype;
         sinttype:=s32inttype;
@@ -417,12 +417,12 @@ implementation
         loadtype('olevariant',colevarianttype);
         loadtype('methodpointer',methodpointertype);
         loadtype('HRESULT',hresultdef);
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
         uinttype:=u64inttype;
         sinttype:=s64inttype;
         ptruinttype:=u64inttype;
         ptrsinttype:=s64inttype;
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
 {$ifdef cpu32bit}
         uinttype:=u32inttype;
         sinttype:=s32inttype;

compiler/ptconst.pas

@@ -423,7 +423,7 @@ implementation
               begin
                 current_asmdata.getdatalabel(ll);
                 list.concat(Tai_const.Create_sym(ll));
-                current_asmdata.asmlists[al_typedconsts].concat(tai_align.create(const_align(sizeof(aint))));
+                current_asmdata.asmlists[al_typedconsts].concat(tai_align.create(const_align(sizeof(pint))));
                 current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(ll));
                 if (p.nodetype in [stringconstn,ordconstn]) then
                   begin
@@ -531,7 +531,7 @@ implementation
                         list.concat(Tai_const.Createname(tlabelsym(srsym).mangledname,offset));
                       constsym :
                         if tconstsym(srsym).consttyp=constresourcestring then
-                          list.concat(Tai_const.Createname(make_mangledname('RESSTR',tconstsym(srsym).owner,tconstsym(srsym).name),sizeof(aint)))
+                          list.concat(Tai_const.Createname(make_mangledname('RESSTR',tconstsym(srsym).owner,tconstsym(srsym).name),sizeof(pint)))
                         else
                           Message(type_e_variable_id_expected);
                       else
@@ -704,10 +704,10 @@ implementation
                          current_asmdata.getdatalabel(ll);
                          list.concat(Tai_const.Create_sym(ll));
                          current_asmdata.getdatalabel(ll2);
-                         current_asmdata.asmlists[al_const].concat(tai_align.create(const_align(sizeof(aint))));
+                         current_asmdata.asmlists[al_const].concat(tai_align.create(const_align(sizeof(pint))));
                          current_asmdata.asmlists[al_const].concat(Tai_label.Create(ll2));
-                         current_asmdata.asmlists[al_const].concat(Tai_const.Create_aint(-1));
-                         current_asmdata.asmlists[al_const].concat(Tai_const.Create_aint(strlength));
+                         current_asmdata.asmlists[al_const].concat(Tai_const.Create_pint(-1));
+                         current_asmdata.asmlists[al_const].concat(Tai_const.Create_pint(strlength));
                          { make sure the string doesn't get dead stripped if the header is referenced }
                          if (target_info.system in systems_darwin) then
                            current_asmdata.asmlists[al_typedconsts].concat(tai_directive.create(asd_reference,ll.name));
@@ -733,14 +733,14 @@ implementation
                          current_asmdata.getdatalabel(ll);
                          list.concat(Tai_const.Create_sym(ll));
                          current_asmdata.getdatalabel(ll2);
-                         current_asmdata.asmlists[al_const].concat(tai_align.create(const_align(sizeof(aint))));
+                         current_asmdata.asmlists[al_const].concat(tai_align.create(const_align(sizeof(pint))));
                          current_asmdata.asmlists[al_const].concat(Tai_label.Create(ll2));
                          if (def.stringtype=st_widestring) and (tf_winlikewidestring in target_info.flags) then
                            current_asmdata.asmlists[al_const].concat(Tai_const.Create_32bit(strlength*cwidechartype.size))
                          else
                            begin
-                             current_asmdata.asmlists[al_const].concat(Tai_const.Create_aint(-1));
-                             current_asmdata.asmlists[al_const].concat(Tai_const.Create_aint(strlength*cwidechartype.size));
+                             current_asmdata.asmlists[al_const].concat(Tai_const.Create_pint(-1));
+                             current_asmdata.asmlists[al_const].concat(Tai_const.Create_pint(strlength*cwidechartype.size));
                            end;
                          { make sure the string doesn't get dead stripped if the header is referenced }
                          if (target_info.system in systems_darwin) then
@@ -1253,7 +1253,7 @@ implementation
                           list.concat(tai_const.create_8bit(0));
                         list.concat(tai_const.createname(def.vmt_mangledname,0));
                         { this is more general }
-                        curroffset:=def.vmt_offset + sizeof(aint);
+                        curroffset:=def.vmt_offset + sizeof(pint);
                         vmtwritten:=true;
                       end;
 
@@ -1280,7 +1280,7 @@ implementation
                 list.concat(tai_const.create_8bit(0));
               list.concat(tai_const.createname(def.vmt_mangledname,0));
               { this is more general }
-              curroffset:=def.vmt_offset + sizeof(aint);
+              curroffset:=def.vmt_offset + sizeof(pint);
             end;
           for i:=1 to def.size-curroffset do
             list.concat(Tai_const.Create_8bit(0));

compiler/ptype.pas

@@ -611,9 +611,9 @@ implementation
                   if torddef(def).ordtype in [uchar,
                     u8bit,u16bit,
                     s8bit,s16bit,s32bit,
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
                     u32bit,s64bit,
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
                     pasbool,bool8bit,bool16bit,bool32bit,bool64bit,
                     uwidechar] then
                     begin

compiler/raatt.pas

@@ -785,7 +785,7 @@ unit raatt;
                 BuildConstSymbolExpression(false,false,false,value,asmsym,asmsymtyp);
                 if asmsym<>'' then
                  begin
-                   if constsize<>sizeof(aint) then
+                   if constsize<>sizeof(pint) then
                     Message(asmr_w_32bit_const_for_address);
                    ConcatConstSymbol(curlist,asmsym,asmsymtyp,value)
                  end
@@ -1009,11 +1009,11 @@ unit raatt;
            AS_DQ:
              Begin
                Consume(AS_DQ);
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
                BuildConstant(8);
-{$else cpu64bit}
+{$else cpu64bitaddr}
                BuildRealConstant(s64comp);
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
              end;
 
            AS_SINGLE:

compiler/rautils.pas

@@ -841,7 +841,7 @@ Begin
               opr.localscale:=0;
               opr.localgetoffset:=GetOffset;
               if paramanager.push_addr_param(tabstractvarsym(sym).varspez,tabstractvarsym(sym).vardef,current_procinfo.procdef.proccalloption) then
-                SetSize(sizeof(aint),false);
+                SetSize(sizeof(pint),false);
             end;
         end;
         case tabstractvarsym(sym).vardef.typ of
@@ -1379,7 +1379,7 @@ Begin
                else
                  begin
                    { size = sizeof(target_system_pointer) }
-                   size:=sizeof(aint);
+                   size:=sizeof(pint);
                    offset:=procdef._class.vmtmethodoffset(procdef.extnumber)
                  end;
              end;

compiler/sparc/cpupara.pas

@@ -81,8 +81,8 @@ implementation
         if nr<1 then
           InternalError(2002100806);
         cgpara.reset;
-        cgpara.size:=OS_INT;
-        cgpara.intsize:=tcgsize2size[OS_INT];
+        cgpara.size:=OS_ADDR;
+        cgpara.intsize:=sizeof(pint);
         cgpara.alignment:=std_param_align;
         paraloc:=cgpara.add_location;
         with paraloc^ do
@@ -175,7 +175,7 @@ implementation
         else
          { Return in register }
           begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitaddr}
             if retcgsize in [OS_64,OS_S64] then
              begin
                p.funcretloc[side].loc:=LOC_REGISTER;
@@ -191,7 +191,7 @@ implementation
                  p.funcretloc[side].register64.reglo:=NR_FUNCTION_RETURN64_LOW_REG;
              end
             else
-{$endif cpu64bit}
+{$endif not cpu64bitaddr}
              begin
                p.funcretloc[side].loc:=LOC_REGISTER;
                p.funcretloc[side].size:=retcgsize;
@@ -284,7 +284,7 @@ implementation
                       paraloc^.reference.index:=NR_FRAME_POINTER_REG;
                     paraloc^.reference.offset:=target_info.first_parm_offset+parasize;
                     { Parameters are aligned at 4 bytes }
-                    inc(parasize,align(tcgsize2size[paraloc^.size],sizeof(aint)));
+                    inc(parasize,align(tcgsize2size[paraloc^.size],sizeof(pint)));
                   end;
                 dec(paralen,tcgsize2size[paraloc^.size]);
               end;

compiler/sparc/ncpucnv.pas

@@ -266,7 +266,7 @@ implementation
                 end
               else
                 hreg2:=left.location.register;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
               if left.location.size in [OS_64,OS_S64] then
                 begin
                   hreg1:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
@@ -274,7 +274,7 @@ implementation
                   hreg2:=hreg1;
                   opsize:=OS_32;
                 end;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
               hreg1:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
               current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUBCC,NR_G0,hreg2,NR_G0));
               if is_pasbool(resultdef) then
@@ -307,7 +307,7 @@ implementation
           else
             internalerror(10062);
         end;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
          if (location.size in [OS_64,OS_S64]) then
            begin
              location.register64.reglo:=hreg1;
@@ -320,7 +320,7 @@ implementation
                cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
            end
          else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
            location.register:=hreg1;
 
         current_procinfo.CurrTrueLabel:=oldTrueLabel;

compiler/sparc/ncpuset.pas

@@ -113,7 +113,7 @@ unit ncpuset;
         { Delay slot }
         current_asmdata.CurrAsmList.concat(taicpu.op_none(A_NOP));
         { generate jump table }
-        new_section(current_procinfo.aktlocaldata,sec_data,current_procinfo.procdef.mangledname,sizeof(aint));
+        new_section(current_procinfo.aktlocaldata,sec_data,current_procinfo.procdef.mangledname,sizeof(pint));
         current_procinfo.aktlocaldata.concat(Tai_label.Create(table));
         last:=min_;
         genitem(current_procinfo.aktlocaldata,hp);

compiler/symdef.pas

@@ -1125,7 +1125,7 @@ implementation
          inherited create(stringdef);
          stringtype:=st_longstring;
          len:=l;
-         savesize:=sizeof(aint);
+         savesize:=sizeof(pint);
       end;
 
 
@@ -1134,7 +1134,7 @@ implementation
          inherited ppuload(stringdef,ppufile);
          stringtype:=st_longstring;
          len:=ppufile.getaint;
-         savesize:=sizeof(aint);
+         savesize:=sizeof(pint);
       end;
 
 
@@ -1143,7 +1143,7 @@ implementation
          inherited create(stringdef);
          stringtype:=st_ansistring;
          len:=-1;
-         savesize:=sizeof(aint);
+         savesize:=sizeof(pint);
       end;
 
 
@@ -1152,7 +1152,7 @@ implementation
          inherited ppuload(stringdef,ppufile);
          stringtype:=st_ansistring;
          len:=ppufile.getaint;
-         savesize:=sizeof(aint);
+         savesize:=sizeof(pint);
       end;
 
 
@@ -1161,7 +1161,7 @@ implementation
          inherited create(stringdef);
          stringtype:=st_widestring;
          len:=-1;
-         savesize:=sizeof(aint);
+         savesize:=sizeof(pint);
       end;
 
 
@@ -1170,7 +1170,7 @@ implementation
          inherited ppuload(stringdef,ppufile);
          stringtype:=st_widestring;
          len:=ppufile.getaint;
-         savesize:=sizeof(aint);
+         savesize:=sizeof(pint);
       end;
 
 
@@ -1179,7 +1179,7 @@ implementation
          inherited create(stringdef);
          stringtype:=st_unicodestring;
          len:=-1;
-         savesize:=sizeof(aint);
+         savesize:=sizeof(pint);
       end;
 
 
@@ -1188,7 +1188,7 @@ implementation
          inherited ppuload(stringdef,ppufile);
          stringtype:=st_unicodestring;
          len:=ppufile.getaint;
-         savesize:=sizeof(aint);
+         savesize:=sizeof(pint);
       end;
 
 
@@ -1769,7 +1769,7 @@ implementation
 
     procedure tfiledef.setsize;
       begin
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
         case filetyp of
           ft_text :
             if target_info.system in [system_x86_64_win64,system_ia64_win64] then
@@ -1783,7 +1783,7 @@ implementation
             else
               savesize:=368;
         end;
-{$else cpu64bit}
+{$else cpu64bitaddr}
         case filetyp of
           ft_text :
             savesize:=592{+4};
@@ -1791,7 +1791,7 @@ implementation
           ft_untyped :
             savesize:=332;
         end;
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
       end;
 
 
@@ -1873,11 +1873,11 @@ implementation
 
     procedure tvariantdef.setsize;
       begin
-{$ifdef cpu64bit}
+{$ifdef cpu64bitaddr}
         savesize:=24;
-{$else cpu64bit}
+{$else cpu64bitaddr}
         savesize:=16;
-{$endif cpu64bit}
+{$endif cpu64bitaddr}
       end;
 
 
@@ -1912,7 +1912,7 @@ implementation
       begin
         inherited create(dt);
         pointeddef:=def;
-        savesize:=sizeof(aint);
+        savesize:=sizeof(pint);
       end;
 
 
@@ -1920,7 +1920,7 @@ implementation
       begin
          inherited ppuload(dt,ppufile);
          ppufile.getderef(pointeddefderef);
-         savesize:=sizeof(aint);
+         savesize:=sizeof(pint);
       end;
 
 
@@ -2299,7 +2299,7 @@ implementation
       begin
         if ado_IsDynamicArray in arrayoptions then
           begin
-            size:=sizeof(aint);
+            size:=sizeof(pint);
             exit;
           end;
 
@@ -2360,7 +2360,7 @@ implementation
       begin
          { alignment of dyn. arrays doesn't depend on the element size }
          if (ado_IsDynamicArray in arrayoptions) then
-           alignment:=size_2_align(sizeof(aint))
+           alignment:=size_2_align(sizeof(pint))
          { alignment is the size of the elements }
          else if (elementdef.typ in [arraydef,recorddef]) or
            ((elementdef.typ=objectdef) and
@@ -2574,7 +2574,7 @@ implementation
          proccalloption:=pocall_none;
          procoptions:=[];
          returndef:=voidtype;
-         savesize:=sizeof(aint);
+         savesize:=sizeof(pint);
          requiredargarea:=0;
          has_paraloc_info:=false;
          location_reset(funcretloc[callerside],LOC_INVALID,OS_NO);
@@ -2702,7 +2702,7 @@ implementation
              ppufile.getdata(funcretloc[callerside],sizeof(funcretloc[callerside]));
            end;
 
-         savesize:=sizeof(aint);
+         savesize:=sizeof(pint);
          has_paraloc_info:=(po_explicitparaloc in procoptions);
       end;
 
@@ -3575,9 +3575,9 @@ implementation
       begin
          if (po_methodpointer in procoptions) and
             not(po_addressonly in procoptions) then
-           size:=2*sizeof(aint)
+           size:=2*sizeof(pint)
          else
-           size:=sizeof(aint);
+           size:=sizeof(pint);
       end;
 
 
@@ -3916,7 +3916,7 @@ implementation
                   if (oo_has_vmt in objectoptions) and
                      (oo_has_vmt in c.objectoptions) then
                     tObjectSymtable(symtable).datasize:=
-                      tObjectSymtable(symtable).datasize-sizeof(aint);
+                      tObjectSymtable(symtable).datasize-sizeof(pint);
                   { if parent has a vmt field then
                     the offset is the same for the child PM }
                   if (oo_has_vmt in c.objectoptions) or is_class(self) then
@@ -3941,11 +3941,11 @@ implementation
                  tObjectSymtable(symtable).fieldalignment);
 
              if (tf_requires_proper_alignment in target_info.flags) then
-               tObjectSymtable(symtable).datasize:=align(tObjectSymtable(symtable).datasize,sizeof(aint));
+               tObjectSymtable(symtable).datasize:=align(tObjectSymtable(symtable).datasize,sizeof(pint));
 
              vmt_offset:=tObjectSymtable(symtable).datasize;
              tObjectSymtable(symtable).datasize:=
-               tObjectSymtable(symtable).datasize+sizeof(aint);
+               tObjectSymtable(symtable).datasize+sizeof(pint);
              include(objectoptions,oo_has_vmt);
           end;
      end;
@@ -4016,7 +4016,7 @@ implementation
     function tobjectdef.size : aint;
       begin
         if objecttype in [odt_class,odt_interfacecom,odt_interfacecorba,odt_dispinterface] then
-          result:=sizeof(aint)
+          result:=sizeof(pint)
         else
           result:=tObjectSymtable(symtable).datasize;
       end;
@@ -4025,7 +4025,7 @@ implementation
     function tobjectdef.alignment:shortint;
       begin
         if objecttype in [odt_class,odt_interfacecom,odt_interfacecorba,odt_dispinterface] then
-          alignment:=sizeof(aint)
+          alignment:=sizeof(pint)
         else
           alignment:=tObjectSymtable(symtable).recordalignment;
       end;
@@ -4036,15 +4036,15 @@ implementation
         { for offset of methods for classes, see rtl/inc/objpash.inc }
         case objecttype of
         odt_class:
-          { the +2*sizeof(Aint) is size and -size }
-          vmtmethodoffset:=(index+10)*sizeof(aint)+2*sizeof(AInt);
+          { the +2*sizeof(pint) is size and -size }
+          vmtmethodoffset:=(index+10)*sizeof(pint)+2*sizeof(pint);
         odt_interfacecom,odt_interfacecorba:
-          vmtmethodoffset:=index*sizeof(aint);
+          vmtmethodoffset:=index*sizeof(pint);
         else
 {$ifdef WITHDMT}
-          vmtmethodoffset:=(index+4)*sizeof(aint);
+          vmtmethodoffset:=(index+4)*sizeof(pint);
 {$else WITHDMT}
-          vmtmethodoffset:=(index+3)*sizeof(aint);
+          vmtmethodoffset:=(index+3)*sizeof(pint);
 {$endif WITHDMT}
         end;
       end;

compiler/x86/cgx86.pas

@@ -1634,15 +1634,15 @@ unit cgx86;
     procedure Tcgx86.g_concatcopy(list:TAsmList;const source,dest:Treference;len:aint);
 
     const
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
         REGCX=NR_RCX;
         REGSI=NR_RSI;
         REGDI=NR_RDI;
-{$else cpu64bit}
+{$else cpu64bitalu}
         REGCX=NR_ECX;
         REGSI=NR_ESI;
         REGDI=NR_EDI;
-{$endif cpu64bit}
+{$endif cpu64bitalu}
 
     type  copymode=(copy_move,copy_mmx,copy_string);
 
@@ -1694,7 +1694,7 @@ unit cgx86;
                     copysize:=4;
                     cgsize:=OS_32;
                   end
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
                 else if len<16 then
                   begin
                     copysize:=8;
@@ -1800,11 +1800,11 @@ unit cgx86;
                   end;
                 if helpsize>0 then
                   begin
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
                     if sizeof(aint)=8 then
                       list.concat(Taicpu.op_none(A_MOVSQ,S_NO))
                     else
-{$endif cpu64bit}
+{$endif cpu64bitalu}
                       list.concat(Taicpu.op_none(A_MOVSD,S_NO));
                   end;
                 if len>=4 then
@@ -1860,7 +1860,7 @@ unit cgx86;
                  mcountPrefix:='';
                 end;
                 current_asmdata.getaddrlabel(pl);
-                new_section(list,sec_data,lower(current_procinfo.procdef.mangledname),sizeof(aint));
+                new_section(list,sec_data,lower(current_procinfo.procdef.mangledname),sizeof(pint));
                 list.concat(Tai_label.Create(pl));
                 list.concat(Tai_const.Create_32bit(0));
                 new_section(list,sec_code,lower(current_procinfo.procdef.mangledname),0);
@@ -2005,19 +2005,19 @@ unit cgx86;
         if not nostackframe then
           begin
             { return address }
-            stackmisalignment := sizeof(aint);
+            stackmisalignment := sizeof(pint);
             list.concat(tai_regalloc.alloc(current_procinfo.framepointer,nil));
             if current_procinfo.framepointer=NR_STACK_POINTER_REG then
               CGmessage(cg_d_stackframe_omited)
             else
               begin
                 { push <frame_pointer> }
-                inc(stackmisalignment,sizeof(aint));
+                inc(stackmisalignment,sizeof(pint));
                 include(rg[R_INTREGISTER].preserved_by_proc,RS_FRAME_POINTER_REG);
                 list.concat(Taicpu.op_reg(A_PUSH,tcgsize2opsize[OS_ADDR],NR_FRAME_POINTER_REG));
                 { Return address and FP are both on stack }
-                current_asmdata.asmcfi.cfa_def_cfa_offset(list,2*sizeof(aint));
-                current_asmdata.asmcfi.cfa_offset(list,NR_FRAME_POINTER_REG,-(2*sizeof(aint)));
+                current_asmdata.asmcfi.cfa_def_cfa_offset(list,2*sizeof(pint));
+                current_asmdata.asmcfi.cfa_offset(list,NR_FRAME_POINTER_REG,-(2*sizeof(pint)));
                 list.concat(Taicpu.op_reg_reg(A_MOV,tcgsize2opsize[OS_ADDR],NR_STACK_POINTER_REG,NR_FRAME_POINTER_REG));
                 current_asmdata.asmcfi.cfa_def_cfa_register(list,NR_FRAME_POINTER_REG);
               end;
@@ -2035,7 +2035,7 @@ unit cgx86;
                   localsize := align(localsize+stackmisalignment,16)-stackmisalignment;
                 cg.g_stackpointer_alloc(list,localsize);
                 if current_procinfo.framepointer=NR_STACK_POINTER_REG then
-                  current_asmdata.asmcfi.cfa_def_cfa_offset(list,localsize+sizeof(aint));
+                  current_asmdata.asmcfi.cfa_def_cfa_offset(list,localsize+sizeof(pint));
               end;
           end;
       end;

compiler/x86/nx86add.pas

@@ -1049,23 +1049,23 @@ unit nx86add;
 
     procedure tx86addnode.second_add64bit;
       begin
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
         second_addordinal;
-{$else cpu64bit}
+{$else cpu64bitalu}
         { must be implemented separate }
         internalerror(200402042);
-{$endif cpu64bit}
+{$endif cpu64bitalu}
       end;
 
 
     procedure tx86addnode.second_cmp64bit;
       begin
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
         second_cmpordinal;
-{$else cpu64bit}
+{$else cpu64bitalu}
         { must be implemented separate }
         internalerror(200402043);
-{$endif cpu64bit}
+{$endif cpu64bitalu}
       end;
 
 

compiler/x86/nx86cnv.pas

@@ -85,13 +85,13 @@ implementation
 
     procedure tx86typeconvnode.second_int_to_bool;
       var
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
         hreg2,
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
         hregister : tregister;
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
         href      : treference;
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
         resflags  : tresflags;
         hlabel,oldTrueLabel,oldFalseLabel : tasmlabel;
       begin
@@ -133,7 +133,7 @@ implementation
             LOC_CREFERENCE,
             LOC_REFERENCE :
               begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                 if left.location.size in [OS_64,OS_S64] then
                  begin
                    hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
@@ -143,7 +143,7 @@ implementation
                    cg.a_op_ref_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,href,hregister);
                  end
                 else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                  begin
                    location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
                    cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
@@ -155,7 +155,7 @@ implementation
               end;
             LOC_REGISTER,LOC_CREGISTER :
               begin
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
                 if left.location.size in [OS_64,OS_S64] then
                  begin
                    hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
@@ -163,7 +163,7 @@ implementation
                    cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,hregister);
                  end
                 else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                   cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
               end;
             LOC_JUMP :
@@ -188,7 +188,7 @@ implementation
            begin
              { load flags to register }
              location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
-{$ifndef cpu64bit}
+{$ifndef cpu64bitalu}
               if (location.size in [OS_64,OS_S64]) then
                 begin
                   hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
@@ -205,7 +205,7 @@ implementation
                     cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
                 end
              else
-{$endif cpu64bit}
+{$endif not cpu64bitalu}
                begin
                  location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
                  cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,location.register);
@@ -248,11 +248,11 @@ implementation
         if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
           location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
         if use_sse(resultdef) and
-{$ifdef cpu64bit}
+{$ifdef cpu64bitalu}
            (torddef(left.resultdef).ordtype in [s32bit,s64bit]) then
-{$else cpu64bit}
+{$else cpu64bitalu}
            (torddef(left.resultdef).ordtype=s32bit) then
-{$endif cpu64bit}
+{$endif cpu64bitalu}
           begin
             location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
             location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
@@ -290,11 +290,11 @@ implementation
             location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
             if (left.location.loc=LOC_REGISTER) and (torddef(left.resultdef).ordtype=u64bit) then
               begin
-    {$ifdef cpu64bit}
+    {$ifdef cpu64bitalu}
                 emit_const_reg(A_BT,S_Q,63,left.location.register);
-    {$else cpu64bit}
+    {$else cpu64bitalu}
                 emit_const_reg(A_BT,S_L,31,left.location.register64.reghi);
-    {$endif cpu64bit}
+    {$endif cpu64bitalu}
                 signtested:=true;
               end
             else

compiler/x86/rax86int.pas

@@ -2024,7 +2024,7 @@ Unit Rax86int;
                 BuildConstSymbolExpression(false,false,value,asmsym,asmsymtyp);
                 if asmsym<>'' then
                  begin
-                   if constsize<>sizeof(aint) then
+                   if constsize<>sizeof(pint) then
                      Message1(asmr_w_const32bit_for_address,asmsym);
                    ConcatConstSymbol(curlist,asmsym,asmsymtyp,value)
                  end

compiler/x86_64/cpupara.pas

@@ -344,8 +344,8 @@ unit cpupara;
         paraloc : pcgparalocation;
       begin
         cgpara.reset;
-        cgpara.size:=OS_INT;
-        cgpara.intsize:=tcgsize2size[OS_INT];
+        cgpara.size:=OS_ADDR;
+        cgpara.intsize:=sizeof(pint);
         cgpara.alignment:=get_para_align(calloption);
         paraloc:=cgpara.add_location;
         with paraloc^ do