 florian
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81c717fc06
+ implemented tthumbcgarm.g_external_wrapper in a way which does not destroy lr
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11 lat temu |
|
florian
|
dffdde7d53
* fixes reference handling for arm thumb and ldrb, not perfect yet and other ldr/str types might need similiar fixes
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11 lat temu |
|
florian
|
836a6e46ca
* several issues with interface wrappers for thumb fixed
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11 lat temu |
 Jonas Maebe
|
b745dcc64c
* moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because
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11 lat temu |
 sergei
|
e4fea2ebc8
* Dummy implementations of a_bit_scan_reg_reg and g_stackpointer_alloc in tcg, removes the need to override these methods in every descendant code generator solely to avoid "constructing a class with abstract method" warning.
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11 lat temu |
 Jeppe Johansen
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a1197460e1
Constrained a number of optimizations and updated reference offsets for ARM Thumb.
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11 lat temu |
 masta
|
0cb1a129b3
{ARM} Implement usage of generic division-by-const optimization
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11 lat temu |
 Károly Balogh
|
af95876eba
arm: an attempt to improve the a_op_const_ref patch in r27881
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11 lat temu |
|
Károly Balogh
|
5b262df7d0
arm: have a CPU specific op_const_ref, so the reference doesn't get fixed up both in a_load_reg_ref and a_load_ref_reg
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11 lat temu |
|
florian
|
8dfcc2b399
* do not reuse tmp. registers in tbasecgarm.handle_load_store
|
11 lat temu |
|
florian
|
9464dad2b4
* handle vldr/vstr references with offsets correctly
|
11 lat temu |
|
florian
|
686a2d2f3f
+ Support omitting the frame pointer on arm even in procedures with incoming parameters
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11 lat temu |
|
florian
|
6deb0b35b5
* handle fpu_vfpv3_d16 properly for thumb2
|
11 lat temu |
|
masta
|
2d2cab0e7a
Fix some internalerror codes in the ARM CG
|
11 lat temu |
|
sergei
|
9c1f917e3a
* a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around.
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11 lat temu |
|
Jeppe Johansen
|
07b2982e77
Don't do ARM FoldShiftLdrStr peephole optimization if there's an offset in the reference.
|
11 lat temu |
|
masta
|
0736bf4ded
Try to change typical constant AND-masking operations into shifts for ARM
|
11 lat temu |
 nickysn
|
85dd9e5789
+ added a size parameter to optimize_op_const and do a sign extension of the 'a' parameter up from the specified size, so that things like (i and $ffffffff) get optimized away the same way as (i and -1)
|
11 lat temu |
|
masta
|
3ab665e554
Try to split constant XORs into two shiftimms on ARM.
|
11 lat temu |
|
masta
|
f8889e3d6d
Use optimize_op_const in ARM cg
|
11 lat temu |
|
florian
|
561ec1f782
* unified internal errors
|
11 lat temu |
|
florian
|
4d5119bf1c
* fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables
|
11 lat temu |
|
Jonas Maebe
|
555634b755
* (re)set upper bits of register when appropriate for all operations in
|
12 lat temu |
|
florian
|
8fb7cf822b
* unified internal errors
|
12 lat temu |
|
florian
|
e0f48b9f02
* calculate stack correction on exit correctly if stack parameters are passed
|
12 lat temu |
|
florian
|
36e6f99843
* fix tthumbcgarm.g_flags2reg, mov reg,#imm for thumb updates the flags
|
12 lat temu |
|
florian
|
e2ec3bbcb0
* do shifts for sign/zero extensions correctly
|
12 lat temu |
|
florian
|
333e84202f
* fixed a_load_reg_reg for thumb
|
12 lat temu |
|
Károly Balogh
|
86cb4d0c12
use a TSuperRegister instead of an aint
|
12 lat temu |
|
Károly Balogh
|
c677f1fd69
trying harder to follow the code style (no functional changes)
|
12 lat temu |
