 florian
|
b2f6214b33
+ a_bit_scan_reg_reg gets a flag if src cannot be zero: this simplifies the generated code
|
il y a 10 mois |
|
florian
|
95c2a5a2d7
+ RiscV: support ZMMUL extension
|
il y a 10 mois |
|
florian
|
1202b2612f
+ RiscV: make use of the fl* rd,symbol,rd pseudoinstruction
|
il y a 11 mois |
|
florian
|
a370b6ff1d
* set is_jmp
|
il y a 11 mois |
|
florian
|
64ba751ef1
* make use of LA pseudo-instruction
|
il y a 1 an |
|
florian
|
0b49fba637
+ more RiscV extensions
|
il y a 1 an |
|
florian
|
1d629270ca
* RiscV64: fix abs(<longint>)
|
il y a 1 an |
|
florian
|
081af9a892
* overleft cosmetics
|
il y a 1 an |
|
florian
|
a71cc71585
+ function needs_check_for_fpu_exceptions to unify fpu exception handling
|
il y a 1 an |
|
florian
|
e66378ee59
* RiscV: generate mret only for FreeRTOS and Embedded
|
il y a 3 ans |
 Jeppe
|
f5cf8956c5
riscv: Merge stack code, fix interrupted code
|
il y a 3 ans |
 pierre
|
9775a13e02
Rough fix for riscv32 failure
|
il y a 4 ans |
|
florian
|
e047e7db91
+ RiscV: initial support of pic generation
|
il y a 4 ans |
|
florian
|
c15bb07bf6
* do not generate mul instructions if the mul extension is not available
|
il y a 4 ans |
|
pierre
|
d4c9e1f260
Replace outdated cgop2string function by tcgsize2str function from cgbase unit to fix EXTDEBUG cycle on powerpc64le-linux
|
il y a 5 ans |
|
pierre
|
92b0ea7d02
Add explicit smallint typecast to first marameter of SarSmallint call to avoid range check errors
|
il y a 6 ans |
|
florian
|
b3ed34592f
+ software handling of exceptions on arm
|
il y a 6 ans |
|
pierre
|
aa89182bf5
Fix compilation with -dEXTDEBUG
|
il y a 7 ans |
|
Jeppe Johansen
|
d33b520690
Clean up peephole optimization code.
|
il y a 7 ans |
|
Jeppe Johansen
|
74a7963d58
Redo overflow checking code.
|
il y a 7 ans |
|
florian
|
4f052e4f90
o fix several issues with floating point exceptions
|
il y a 7 ans |
|
florian
|
999cbd94b8
+ support to generate software based floating point exception checking
|
il y a 7 ans |
|
Jeppe Johansen
|
a8c82856b1
Fixed missing maybeadjust calls after not operation.
|
il y a 7 ans |
|
Jeppe Johansen
|
b98eb3daa9
Changed order in stack unravelling RTL code, to match the most common cases.
|
il y a 7 ans |
|
Jeppe Johansen
|
c6b27bc225
Fix shift operations on 32bit operands.
|
il y a 7 ans |
|
Jeppe Johansen
|
2499129ba5
Pass aggregates larger than 2*XLEN as a reference.
|
il y a 7 ans |
|
Jeppe Johansen
|
054bf32f1f
Add RV64GC cpu type.
|
il y a 7 ans |
|
Jeppe Johansen
|
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
|
il y a 7 ans |
