 florian
|
f65994ddcb
+ RiscV: flags for crypotography extensions
|
il y a 6 mois |
|
florian
|
8e45bb133d
+ RV64GCB CPU type
|
il y a 7 mois |
|
florian
|
e17c575123
* properly write RV32E/RV64E architecture tags
|
il y a 8 mois |
|
florian
|
95c2a5a2d7
+ RiscV: support ZMMUL extension
|
il y a 8 mois |
|
florian
|
cfc5f17b0d
+ CPURV_HAS_ZICOND
|
il y a 8 mois |
|
florian
|
0b49fba637
+ more RiscV extensions
|
il y a 11 mois |
|
florian
|
a53eb8b230
+ Risc-V: make use of zext.h if available
|
il y a 1 an |
|
florian
|
0366df9fbd
+ Zb* cpu capabilities
|
il y a 1 an |
|
florian
|
1ecc880fc8
+ cpu type RV64GC
|
il y a 1 an |
|
florian
|
0a88683310
+ do do_consttovar on RiscV
|
il y a 1 an |
|
florian
|
19ad26afd8
* Riscv32 and Riscv64 on linux: enable safecall support
|
il y a 3 ans |
|
florian
|
27fb9086aa
* cleanup: cs_opt_loopunroll is a generic optimization for a long time already
|
il y a 3 ans |
|
florian
|
ff3acfb8cd
* cleanup of 2.7.0 defines
|
il y a 4 ans |
 Jonas Maebe
|
592df7fa59
* disable cs_opt_regvar on all platforms when compiled for LLVM (LLVM does
|
il y a 5 ans |
|
florian
|
ef87879402
* common naming for fpu_none string
|
il y a 5 ans |
 Jeppe Johansen
|
a1a17447ff
- Fix bug in 64bit softfloat double negation.
|
il y a 6 ans |
 pierre
|
828a248287
Systematically include fpcdefs.inc at sart of all units used by compiler
|
il y a 6 ans |
|
Jeppe Johansen
|
054bf32f1f
Add RV64GC cpu type.
|
il y a 7 ans |
|
Jeppe Johansen
|
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
|
il y a 7 ans |
