florian
|
f619a1aaf6
* fld/fst can have a base register+offset
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13 years ago |
florian
|
e81ba0f82e
+ make use of the armv6+ sign/zero extension instructions if appropriate
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13 years ago |
florian
|
19ed835f2b
* don't generate an extra indirection when loading vfp constants
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13 years ago |
masta
|
c16871e129
Generate better code in Tthumb2cgarm.g_flags2reg
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13 years ago |
masta
|
57b67dfa30
Better SP adjustments on entry/exit for ARM
|
13 years ago |
florian
|
95732625cc
* use r11 as a normal register if no frame pointer is needed
|
13 years ago |
masta
|
dbf0404fb0
More consolidation of OP_SHL/SHR/ROR/SAR in ARM CodeGen
|
13 years ago |
masta
|
d2d5d17557
Consolidate handling of OP_SHL/SHR/ROL/ROR/SAR in ARM CodeGen
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13 years ago |
Jonas Maebe
|
7a0ae38700
+ also specify the parameter def when allocating a parameter via
|
13 years ago |
masta
|
2768e0fc12
Folded Add/Sub/Or Splitter, lots of debug output
|
13 years ago |
masta
|
92c47148cc
Optimize 8/16 OP_NOT on ARM
|
13 years ago |
masta
|
0f3441a9c2
Split OP_ADD, OP_SUB, OP_AND and OP_ORR into multiple instructions if that can avoid constant construction or even loading from a pool.
|
13 years ago |
masta
|
f11fbe527e
Improve loading of ARM constant values
|
13 years ago |
florian
|
45c70ec81c
* patch by Nico Erfurth: Support the usage of BIC instead of AND on ARM
|
13 years ago |
florian
|
4ea1d22c5a
* patch by Nico Erfruth: Support BX for function returns on armv5+
|
13 years ago |
florian
|
c75486db89
* patch by Nico Erfurth:
|
13 years ago |
florian
|
5f0bcd9248
* patch by Nico Erfurth:
|
13 years ago |
Jonas Maebe
|
bba4b02eb2
* use r7 instead of r11 as frame pointer on Darwin/iOS, and make sure r7
|
13 years ago |
Jonas Maebe
|
6ba8dc7146
+ support for the ARM hard float EABI on Linux (patch by Peter Green):
|
13 years ago |
florian
|
841d67ec81
* don't waste an extra register when copying 4 bytes
|
13 years ago |
pierre
|
42c98f3cd5
Override abstract method to abvoid warning at compilation time
|
13 years ago |
florian
|
ce61891ca3
* offset used by A_LDF,A_STF,A_FLDS,A_FLDD,A_FSTS,A_FSTD must be dividable by 4
|
14 years ago |
Jonas Maebe
|
2b11fd2bef
* cpus that only understand Thumb-2 don't support "blx <imm>"
|
14 years ago |
florian
|
5fa184c952
+ patch by Jeppe Johansen to make use of the div/udiv instruction on arm7m, resolves #20022
|
14 years ago |
Jonas Maebe
|
852ae48cb7
* also use blx instead of bl for direct calls on ARMv5+, since the target
|
14 years ago |
florian
|
26850e3425
* fix full cycle after adding new boolean types
|
14 years ago |
florian
|
77f2d6cc0d
* introduce usage of TCGInt in the code generator units
|
14 years ago |
svenbarth
|
35b47e491c
Rebase to revision 17306
|
14 years ago |
florian
|
8bff2a0de4
* patch by Jeppe Johansen to fix thumb2 epilog generation, resolves #18392
|
14 years ago |
svenbarth
|
96116a6c3a
Several adjustments because virtual methods in helpers are just normal methods and a VMT isn't generated for them either.
|
14 years ago |