提交历史

作者 SHA1 备注 提交日期
  florian f65994ddcb + RiscV: flags for crypotography extensions 6 月之前
  florian 8e45bb133d + RV64GCB CPU type 7 月之前
  florian e17c575123 * properly write RV32E/RV64E architecture tags 8 月之前
  florian 95c2a5a2d7 + RiscV: support ZMMUL extension 8 月之前
  florian cfc5f17b0d + CPURV_HAS_ZICOND 8 月之前
  florian 0b49fba637 + more RiscV extensions 10 月之前
  florian a53eb8b230 + Risc-V: make use of zext.h if available 1 年之前
  florian 0366df9fbd + Zb* cpu capabilities 1 年之前
  florian 1ecc880fc8 + cpu type RV64GC 1 年之前
  florian 0a88683310 + do do_consttovar on RiscV 1 年之前
  florian 19ad26afd8 * Riscv32 and Riscv64 on linux: enable safecall support 3 年之前
  florian 27fb9086aa * cleanup: cs_opt_loopunroll is a generic optimization for a long time already 3 年之前
  florian ff3acfb8cd * cleanup of 2.7.0 defines 4 年之前
  Jonas Maebe 592df7fa59 * disable cs_opt_regvar on all platforms when compiled for LLVM (LLVM does 5 年之前
  florian ef87879402 * common naming for fpu_none string 5 年之前
  Jeppe Johansen a1a17447ff - Fix bug in 64bit softfloat double negation. 6 年之前
  pierre 828a248287 Systematically include fpcdefs.inc at sart of all units used by compiler 6 年之前
  Jeppe Johansen 054bf32f1f Add RV64GC cpu type. 7 年之前
  Jeppe Johansen ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 年之前