 Károly Balogh
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258b42de26
m68k: added support for FSIN/FCOS. these are software supported on the 68040, so we should have a separate 68040/060 FPU option too, to avoid these in the future.
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%!s(int64=10) %!d(string=hai) anos |
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Károly Balogh
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c062e55aa2
m68k: after a compare on the FPU, move the condition flags back to the CPU. this should make floating point compare actually working
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%!s(int64=10) %!d(string=hai) anos |
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Károly Balogh
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9d6f763d4f
m68k: small helpers to determine a given int value fits into a certain size or instruction argument
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%!s(int64=10) %!d(string=hai) anos |
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Károly Balogh
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6070ac3def
m68k: some more basic FPU stuff
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%!s(int64=10) %!d(string=hai) anos |
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Károly Balogh
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8acc260a09
m68k: added the byterev and ff1 CF ISAA+/ISAC instructions, also added byterev as a CPU capability
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%!s(int64=11) %!d(string=hai) anos |
 sergei
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c79cd3beca
* m68k: fixed/completed the inverse_cond function.
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%!s(int64=11) %!d(string=hai) anos |
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Károly Balogh
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7ee09b9620
instead of supporting SP only, have register A7 defined, and have SP as an alias
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%!s(int64=11) %!d(string=hai) anos |
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Károly Balogh
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80b253c111
be consistent in naming. renamed VOLATILE_ADDRESSREGISTER to VOLATILE_ADDRESSREGISTERS
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%!s(int64=11) %!d(string=hai) anos |
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Károly Balogh
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97864d7cbd
trying harder to commit compilable code (manual merge fail)
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%!s(int64=12) %!d(string=hai) anos |
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Károly Balogh
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3b99974847
set up register A6 to be saved as well. this will only happen in case A6 is not used as framepointer
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%!s(int64=12) %!d(string=hai) anos |
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Károly Balogh
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dfe2f253f9
added 68040 CPU type, MOVE16 and ColdFire V4 extra instructions
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%!s(int64=12) %!d(string=hai) anos |
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Károly Balogh
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280ee919b7
removed several debug writeln()s
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%!s(int64=12) %!d(string=hai) anos |
 svenbarth
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c48d572996
Implement support for saving and restoring address registers.
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%!s(int64=12) %!d(string=hai) anos |
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Károly Balogh
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55be015a4e
better version of the ColdFire TST.L 123(dX) fix, fixes regressions in tcnvint1 and 2
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%!s(int64=12) %!d(string=hai) anos |
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svenbarth
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03623c6c1a
Forgot to commit that I moved tcgsize2opsize from cgcpu to cpubase.
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%!s(int64=12) %!d(string=hai) anos |
 masta
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e327b4581c
Use TRegNameTable instead of array[tregisterindex] of string[10]
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%!s(int64=13) %!d(string=hai) anos |
 florian
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04543b179f
o merge of the branch laksen/arm-embedded of Jeppe Johansen:
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%!s(int64=13) %!d(string=hai) anos |
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svenbarth
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786e814d49
Use the correct frame pointer register: A6 on Unixes and A5 on everything else. The only
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%!s(int64=13) %!d(string=hai) anos |
 Jeppe Johansen
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0087661fb5
Added FPv4_d16 FPU instructions, and a few extra registers
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%!s(int64=13) %!d(string=hai) anos |
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florian
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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%!s(int64=13) %!d(string=hai) anos |
 Jonas Maebe
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708a2532fc
* consistently define empty saved_mm_registers arrays as containing a single
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%!s(int64=13) %!d(string=hai) anos |
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Jonas Maebe
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85a3fd3357
+ ossinttype/osuinttype defs that correspond to OS_SINT/OS_INT for use in
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%!s(int64=13) %!d(string=hai) anos |
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Jonas Maebe
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34c985cfa6
* added register type parameter to cgsize2subreg(), as the subreg can
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%!s(int64=16) %!d(string=hai) anos |
 yury
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491f0fa1d8
* Replaced all user defined warnings by TODO comments to reduce compiler noise.
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%!s(int64=17) %!d(string=hai) anos |
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Károly Balogh
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14f958682c
+ first attempt to implement a_call_reg
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%!s(int64=18) %!d(string=hai) anos |
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florian
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00d6a03b2c
+ default code now preserves mm registers
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%!s(int64=18) %!d(string=hai) anos |
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florian
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3a630340be
* fixed m68k compilation and put it in fullcycle
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%!s(int64=18) %!d(string=hai) anos |
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florian
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4cbb67aa00
* some fpu emulation code from arm to generic code generator moved
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%!s(int64=19) %!d(string=hai) anos |
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Jonas Maebe
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90cacb4cf5
* changed result type of dwarf_reg from byte to shortint to avoid
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%!s(int64=19) %!d(string=hai) anos |
 peter
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870be04a3f
* use dwarf_reg()
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%!s(int64=19) %!d(string=hai) anos |
