 Jonas Maebe
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9376f5a43a
* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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il y a 5 ans |
 florian
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69786ffe73
somehow committing went wrong, second part of last commit:
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il y a 6 ans |
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Jonas Maebe
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f1fb880f18
* fixed debug register values for vector registers
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il y a 10 ans |
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Jonas Maebe
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9c55fa6f6c
+ FPCR, FPSR and TPIDR registers
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il y a 10 ans |
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Jonas Maebe
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f1b619a942
* made (X|W)ZR and (W)SP separate registers, because a number of
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il y a 10 ans |
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florian
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ca75588989
+ first cpubase implementation for aarch64
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il y a 13 ans |
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florian
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5af1d48158
+ register definitions for AArch64 aka ARM64
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il y a 13 ans |
