 Károly Balogh
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92b2cf917d
m68k: when saving/restoring FPU registers, use the right FPU register size on ColdFire to calculate the stored size
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il y a 9 ans |
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Károly Balogh
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23106882ac
m68k: extended TResFlags with float resflags
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il y a 9 ans |
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Károly Balogh
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bd564b8933
m68k: some code to support the ColdFire v4e FPU. not functional yet.
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il y a 9 ans |
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Károly Balogh
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288fa53694
m68k: is_calljmp cleanup
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il y a 9 ans |
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Károly Balogh
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9c12615f09
m68k: new isregoverlap function, which returns true if the two registers overlap (same type and subreg). use the new r68kbss.inc for regnumber_count_bsstart. other minor tweaks.
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il y a 9 ans |
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Károly Balogh
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258b42de26
m68k: added support for FSIN/FCOS. these are software supported on the 68040, so we should have a separate 68040/060 FPU option too, to avoid these in the future.
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il y a 10 ans |
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Károly Balogh
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c062e55aa2
m68k: after a compare on the FPU, move the condition flags back to the CPU. this should make floating point compare actually working
|
il y a 10 ans |
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Károly Balogh
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9d6f763d4f
m68k: small helpers to determine a given int value fits into a certain size or instruction argument
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il y a 10 ans |
|
Károly Balogh
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6070ac3def
m68k: some more basic FPU stuff
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il y a 10 ans |
|
Károly Balogh
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8acc260a09
m68k: added the byterev and ff1 CF ISAA+/ISAC instructions, also added byterev as a CPU capability
|
il y a 11 ans |
 sergei
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c79cd3beca
* m68k: fixed/completed the inverse_cond function.
|
il y a 11 ans |
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Károly Balogh
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7ee09b9620
instead of supporting SP only, have register A7 defined, and have SP as an alias
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il y a 11 ans |
|
Károly Balogh
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80b253c111
be consistent in naming. renamed VOLATILE_ADDRESSREGISTER to VOLATILE_ADDRESSREGISTERS
|
il y a 11 ans |
|
Károly Balogh
|
97864d7cbd
trying harder to commit compilable code (manual merge fail)
|
il y a 12 ans |
|
Károly Balogh
|
3b99974847
set up register A6 to be saved as well. this will only happen in case A6 is not used as framepointer
|
il y a 12 ans |
|
Károly Balogh
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dfe2f253f9
added 68040 CPU type, MOVE16 and ColdFire V4 extra instructions
|
il y a 12 ans |
|
Károly Balogh
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280ee919b7
removed several debug writeln()s
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il y a 12 ans |
 svenbarth
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c48d572996
Implement support for saving and restoring address registers.
|
il y a 12 ans |
|
Károly Balogh
|
55be015a4e
better version of the ColdFire TST.L 123(dX) fix, fixes regressions in tcnvint1 and 2
|
il y a 12 ans |
|
svenbarth
|
03623c6c1a
Forgot to commit that I moved tcgsize2opsize from cgcpu to cpubase.
|
il y a 12 ans |
 masta
|
e327b4581c
Use TRegNameTable instead of array[tregisterindex] of string[10]
|
il y a 13 ans |
 florian
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04543b179f
o merge of the branch laksen/arm-embedded of Jeppe Johansen:
|
il y a 13 ans |
|
svenbarth
|
786e814d49
Use the correct frame pointer register: A6 on Unixes and A5 on everything else. The only
|
il y a 13 ans |
 Jeppe Johansen
|
0087661fb5
Added FPv4_d16 FPU instructions, and a few extra registers
|
il y a 13 ans |
|
florian
|
4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
|
il y a 13 ans |
 Jonas Maebe
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708a2532fc
* consistently define empty saved_mm_registers arrays as containing a single
|
il y a 13 ans |
|
Jonas Maebe
|
85a3fd3357
+ ossinttype/osuinttype defs that correspond to OS_SINT/OS_INT for use in
|
il y a 13 ans |
|
Jonas Maebe
|
34c985cfa6
* added register type parameter to cgsize2subreg(), as the subreg can
|
il y a 16 ans |
 yury
|
491f0fa1d8
* Replaced all user defined warnings by TODO comments to reduce compiler noise.
|
il y a 17 ans |
|
Károly Balogh
|
14f958682c
+ first attempt to implement a_call_reg
|
il y a 18 ans |
