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aasmcpu.pas
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1cb8c0d00c
* specify the def of assembler level symbols defined via
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%!s(int64=9) %!d(string=hai) anos |
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agarmgas.pas
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74a49b5f91
* restructured the the TExternalAssembler constructors so that the
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%!s(int64=8) %!d(string=hai) anos |
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aoptcpu.pas
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38fd0efa3b
* don't conditionalise BL on ARM, because it may have to be converted to
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%!s(int64=9) %!d(string=hai) anos |
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aoptcpub.pas
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d37e72dbf9
* ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions.
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%!s(int64=11) %!d(string=hai) anos |
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aoptcpud.pas
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790a4fe2d3
* log and id tags removed
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%!s(int64=20) %!d(string=hai) anos |
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armatt.inc
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9d1646e2a8
Add support for writeback in RFE and SRS instructions.
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%!s(int64=9) %!d(string=hai) anos |
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armatts.inc
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9d1646e2a8
Add support for writeback in RFE and SRS instructions.
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%!s(int64=9) %!d(string=hai) anos |
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armins.dat
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c564acd378
* fix assembling of vfnm*
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%!s(int64=9) %!d(string=hai) anos |
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armnop.inc
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439027a8de
Add most pre-UAL VFP instruction forms.
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%!s(int64=10) %!d(string=hai) anos |
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armop.inc
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9d1646e2a8
Add support for writeback in RFE and SRS instructions.
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%!s(int64=9) %!d(string=hai) anos |
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armreg.dat
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387824c1ee
Added some APSR register bitmask definitions.
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%!s(int64=10) %!d(string=hai) anos |
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armtab.inc
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c564acd378
* fix assembling of vfnm*
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%!s(int64=9) %!d(string=hai) anos |
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cgcpu.pas
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a25ebbba3e
+ added volatility information to all memory references
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%!s(int64=8) %!d(string=hai) anos |
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cpubase.pas
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ad71b8348e
* S1..S15 do not need to be marked as volatile as they are sub-registers of double size registers
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%!s(int64=9) %!d(string=hai) anos |
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cpuelf.pas
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86940dfb32
AROS: added arm-aros target to compiler and fpcmake
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%!s(int64=8) %!d(string=hai) anos |
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cpuinfo.pas
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6a1c1e4f29
Added support for NRF52832 controllers.
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%!s(int64=9) %!d(string=hai) anos |
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cpunode.pas
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a0efde8167
* automatically generate necessary indirect symbols when a new assembler
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%!s(int64=9) %!d(string=hai) anos |
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cpupara.pas
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cb4773432b
+ hardfloat directive (arm only): use hard float calling conventions regardless of the abi, resolves #29715
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%!s(int64=9) %!d(string=hai) anos |
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cpupi.pas
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1c067e96bf
* fix VFPv4 support
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%!s(int64=9) %!d(string=hai) anos |
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cputarg.pas
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86940dfb32
AROS: added arm-aros target to compiler and fpcmake
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%!s(int64=8) %!d(string=hai) anos |
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hlcgcpu.pas
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a25ebbba3e
+ added volatility information to all memory references
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%!s(int64=8) %!d(string=hai) anos |
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itcpugas.pas
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47d43750e4
* remove unused units from uses statements
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%!s(int64=12) %!d(string=hai) anos |
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narmadd.pas
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e1546303f8
+ enable use of vfma and friends on arm when doing fastmath optimizations
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%!s(int64=9) %!d(string=hai) anos |
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narmcal.pas
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f5f895e2a3
syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed
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%!s(int64=8) %!d(string=hai) anos |
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narmcnv.pas
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a25ebbba3e
+ added volatility information to all memory references
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%!s(int64=8) %!d(string=hai) anos |
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narmcon.pas
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a25ebbba3e
+ added volatility information to all memory references
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%!s(int64=8) %!d(string=hai) anos |
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narminl.pas
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a25ebbba3e
+ added volatility information to all memory references
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%!s(int64=8) %!d(string=hai) anos |
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narmmat.pas
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1c067e96bf
* fix VFPv4 support
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%!s(int64=9) %!d(string=hai) anos |
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narmmem.pas
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d6de2c03cb
* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe
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%!s(int64=10) %!d(string=hai) anos |
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narmset.pas
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a25ebbba3e
+ added volatility information to all memory references
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%!s(int64=8) %!d(string=hai) anos |
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pp.lpi.template
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1f032375c3
* improved template with help from Mattias Gaertner
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%!s(int64=19) %!d(string=hai) anos |
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raarm.pas
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780e75bfac
o patch by Jeppe Johansen to fix mantis #17472:
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%!s(int64=14) %!d(string=hai) anos |
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raarmgas.pas
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a25ebbba3e
+ added volatility information to all memory references
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%!s(int64=8) %!d(string=hai) anos |
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rarmcon.inc
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387824c1ee
Added some APSR register bitmask definitions.
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%!s(int64=10) %!d(string=hai) anos |
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rarmdwa.inc
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387824c1ee
Added some APSR register bitmask definitions.
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%!s(int64=10) %!d(string=hai) anos |
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rarmnor.inc
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387824c1ee
Added some APSR register bitmask definitions.
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%!s(int64=10) %!d(string=hai) anos |
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rarmnum.inc
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387824c1ee
Added some APSR register bitmask definitions.
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%!s(int64=10) %!d(string=hai) anos |
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rarmrni.inc
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387824c1ee
Added some APSR register bitmask definitions.
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%!s(int64=10) %!d(string=hai) anos |
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rarmsri.inc
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387824c1ee
Added some APSR register bitmask definitions.
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%!s(int64=10) %!d(string=hai) anos |
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rarmsta.inc
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387824c1ee
Added some APSR register bitmask definitions.
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%!s(int64=10) %!d(string=hai) anos |
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rarmstd.inc
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387824c1ee
Added some APSR register bitmask definitions.
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%!s(int64=10) %!d(string=hai) anos |
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rarmsup.inc
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387824c1ee
Added some APSR register bitmask definitions.
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%!s(int64=10) %!d(string=hai) anos |
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rgcpu.pas
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a25ebbba3e
+ added volatility information to all memory references
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%!s(int64=8) %!d(string=hai) anos |
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symcpu.pas
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657aa06360
arm: arm-aros syscall support
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%!s(int64=8) %!d(string=hai) anos |
Károly Balogh
f5f895e2a3
syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed