florian 6f223a1634 * small fixes for RiscV ABI regarding floating point registers 1 hafta önce
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aasmcpu.pas 425ef662cc * patch by Pierre to fix spilling and jump handling of pseudo-instructions 6 ay önce
agrvgas.pas ca1511b83c + RiscV: CPU type rv32imafc added 2 hafta önce
aoptcpurv.pas 1d5a31ed41 + comment 4 hafta önce
cgrv.pas 065ddfd8d4 + RiscV: ROL/ROR code generation support 6 ay önce
cpubase.pas 425ef662cc * patch by Pierre to fix spilling and jump handling of pseudo-instructions 6 ay önce
hlcgrv.pas 637976e83f * patch by Marģers to unify internal error numbers, resolves #37888 5 yıl önce
itcpugas.pas 971d97c179 + RiscV: make use of the fmv.w.x/fmv.d.x instruction to load 0.0 9 ay önce
nrvadd.pas 95c2a5a2d7 + RiscV: support ZMMUL extension 8 ay önce
nrvcnv.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 yıl önce
nrvcon.pas f417c87ec8 * RiscV: check for cpu capabilities before using fmv for loading zero 9 ay önce
nrvinl.pas 7aae7a8d51 + min/max optimization support for RiscV 9 ay önce
nrvmat.pas c3110dfaa9 + RiscV: make use of the fneg.* instruction 9 ay önce
nrvset.pas f71871e60d * generating a linear sub list makes no sense for RiscV 1 ay önce
nrvutil.pas fecd25bac1 * fix typo 7 ay önce
pararv.pas 6f223a1634 * small fixes for RiscV ABI regarding floating point registers 1 hafta önce
rarv.pas d1fb44044f * unified RiscV32 and RiscV64 GAS readers 4 yıl önce
rarvgas.pas a05aa25aad * Risc-V: allow also register aliases in register modification lists after asm blocks, last part to resolve #39738 3 yıl önce
rgcpu.pas 92b0ea7d02 Add explicit smallint typecast to first marameter of SarSmallint call to avoid range check errors 5 yıl önce
rvreg.dat 8d0bdf2f16 + RiscV: vector registers 9 ay önce