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aoptcpu.pas
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f68558b88c
* factored out TX86AsmOptimizer.OptPass2Imul
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8 years ago |
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aoptcpub.pas
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2f5ce095ce
* RefsHaveIndexReg -> cpurefshaveindexreg
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13 years ago |
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aoptcpud.pas
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790a4fe2d3
* log and id tags removed
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20 years ago |
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cgcpu.pas
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265c8e7bbc
+ support for specifying ms_abi_default, ms_abi_cdelc, sysv_abi_default, and
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8 years ago |
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cpubase.inc
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bfbb0c5b9d
* optimize mov/lea
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12 years ago |
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cpuelf.pas
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7ca62febcd
AROS/x86_64: initial AROS/x86_64 support and implement syscalls for AROS/x86_64
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10 years ago |
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cpuinfo.pas
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265c8e7bbc
+ support for specifying ms_abi_default, ms_abi_cdelc, sysv_abi_default, and
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8 years ago |
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cpunode.pas
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a0efde8167
* automatically generate necessary indirect symbols when a new assembler
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9 years ago |
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cpupara.pas
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265c8e7bbc
+ support for specifying ms_abi_default, ms_abi_cdelc, sysv_abi_default, and
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8 years ago |
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cpupi.pas
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265c8e7bbc
+ support for specifying ms_abi_default, ms_abi_cdelc, sysv_abi_default, and
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8 years ago |
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cputarg.pas
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1c0c944311
Added x86_64-embedded target. Patch from Benjamin Rosseaux
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9 years ago |
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hlcgcpu.pas
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265c8e7bbc
+ support for specifying ms_abi_default, ms_abi_cdelc, sysv_abi_default, and
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8 years ago |
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nx64add.pas
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a25ebbba3e
+ added volatility information to all memory references
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9 years ago |
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nx64cal.pas
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265c8e7bbc
+ support for specifying ms_abi_default, ms_abi_cdelc, sysv_abi_default, and
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8 years ago |
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nx64cnv.pas
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a25ebbba3e
+ added volatility information to all memory references
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9 years ago |
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nx64flw.pas
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b14c037533
* record in the flowcontrol flags whether we are currently in a block whose
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8 years ago |
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nx64inl.pas
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1bcc276dcf
* remove implicit typecast to extended automatically inserted for trunc/round
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10 years ago |
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nx64mat.pas
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b594eee70b
* Moved x86_64 mod/div code to x86, with minimal changes to ensure it compiles on i386/i8086. Merging optimized division-by-const code from i386 is pending...
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11 years ago |
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nx64set.pas
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a25ebbba3e
+ added volatility information to all memory references
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9 years ago |
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r8664ari.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r8664att.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r8664con.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r8664dwrf.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r8664int.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r8664iri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r8664nasm.inc
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2ec5a649d7
* set Ch_* for more operations
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11 years ago |
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r8664nor.inc
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283ff05127
* merged avx support in inline assembler developed by Torsten Grundke
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13 years ago |
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r8664num.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r8664ot.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r8664rni.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r8664sri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r8664stab.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r8664std.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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rax64att.pas
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8f05f8c839
- Forgot to commit with r29081
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11 years ago |
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rax64int.pas
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f726e1691b
* Fixed warnings and notes.
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16 years ago |
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rgcpu.pas
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a3f58e84be
* rbp can be used for normal purpose under certain conditions so it shouldn't interfere with all other registers
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11 years ago |
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symcpu.pas
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4f7b4a2735
* changed {$ifdef x86} code in defcmp into virtual methods
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10 years ago |
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win64unw.pas
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6a3fe72de9
+ Support .rva directive in AT&T reader. Put it into base class because it generally applies to all targets with COFF output, but enabled for Windows targets only (others need additional testing).
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14 years ago |
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x8664ats.inc
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48fbd569fd
* support for the CDQE instruction, by Emelyanov Roman, resolves #30978
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9 years ago |
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x8664att.inc
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48fbd569fd
* support for the CDQE instruction, by Emelyanov Roman, resolves #30978
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9 years ago |
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x8664int.inc
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48fbd569fd
* support for the CDQE instruction, by Emelyanov Roman, resolves #30978
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9 years ago |
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x8664nop.inc
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48fbd569fd
* support for the CDQE instruction, by Emelyanov Roman, resolves #30978
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9 years ago |
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x8664op.inc
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48fbd569fd
* support for the CDQE instruction, by Emelyanov Roman, resolves #30978
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9 years ago |
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x8664pro.inc
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48fbd569fd
* support for the CDQE instruction, by Emelyanov Roman, resolves #30978
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9 years ago |
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x8664tab.inc
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48fbd569fd
* support for the CDQE instruction, by Emelyanov Roman, resolves #30978
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9 years ago |
Jonas Maebe
265c8e7bbc
+ support for specifying ms_abi_default, ms_abi_cdelc, sysv_abi_default, and