| .. |
|
aoptcpu.pas
|
39f7172ee8
* do no generated debug comment in assembler output of RiscV if not requested
|
il y a 1 an |
|
aoptcpub.pas
|
9b0ff05ee8
- get rid of MaxOps, it is redundant with max_operands
|
il y a 6 ans |
|
aoptcpuc.pas
|
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
|
il y a 7 ans |
|
aoptcpud.pas
|
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
|
il y a 7 ans |
|
cgcpu.pas
|
39f7172ee8
* do no generated debug comment in assembler output of RiscV if not requested
|
il y a 1 an |
|
cpuinfo.pas
|
0a88683310
+ do do_consttovar on RiscV
|
il y a 1 an |
|
cpunode.pas
|
6352328f3a
Update packages with information about RiscV.
|
il y a 7 ans |
|
cpupara.pas
|
1e3f72403e
* renamed getintparaloc to getcgtempparaloc
|
il y a 5 ans |
|
cpupi.pas
|
281b3ad276
* fix case completeness and unreachable code warnings in compiler that would
|
il y a 6 ans |
|
cputarg.pas
|
d1fb44044f
* unified RiscV32 and RiscV64 GAS readers
|
il y a 4 ans |
|
hlcgcpu.pas
|
d4c9e1f260
Replace outdated cgop2string function by tcgsize2str function from cgbase unit to fix EXTDEBUG cycle on powerpc64le-linux
|
il y a 5 ans |
|
nrv64add.pas
|
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
|
il y a 7 ans |
|
nrv64cal.pas
|
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
|
il y a 7 ans |
|
nrv64cnv.pas
|
f3b7e3281a
* fix int to real for non-register locations
|
il y a 7 ans |
|
nrv64ld.pas
|
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
|
il y a 7 ans |
|
nrv64mat.pas
|
28f25b2df0
* reworked usage of tcgnotnode.handle_locjump
|
il y a 5 ans |
|
rrv64con.inc
|
eaeb8b70ff
+ added Risc-V register information file generation to the compiler Makefile
|
il y a 3 ans |
|
rrv64dwa.inc
|
eaeb8b70ff
+ added Risc-V register information file generation to the compiler Makefile
|
il y a 3 ans |
|
rrv64nor.inc
|
eaeb8b70ff
+ added Risc-V register information file generation to the compiler Makefile
|
il y a 3 ans |
|
rrv64num.inc
|
eaeb8b70ff
+ added Risc-V register information file generation to the compiler Makefile
|
il y a 3 ans |
|
rrv64rni.inc
|
eaeb8b70ff
+ added Risc-V register information file generation to the compiler Makefile
|
il y a 3 ans |
|
rrv64sri.inc
|
eaeb8b70ff
+ added Risc-V register information file generation to the compiler Makefile
|
il y a 3 ans |
|
rrv64sta.inc
|
eaeb8b70ff
+ added Risc-V register information file generation to the compiler Makefile
|
il y a 3 ans |
|
rrv64std.inc
|
eaeb8b70ff
+ added Risc-V register information file generation to the compiler Makefile
|
il y a 3 ans |
|
rrv64sup.inc
|
eaeb8b70ff
+ added Risc-V register information file generation to the compiler Makefile
|
il y a 3 ans |
|
symcpu.pas
|
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
|
il y a 7 ans |
|
tripletcpu.pas
|
52147baa04
* correct tripletcpustr, resolves #40301
|
il y a 2 ans |
florian
39f7172ee8
* do no generated debug comment in assembler output of RiscV if not requested