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aoptcpud.pas
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790a4fe2d3
* log and id tags removed
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20 years ago |
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cgcpu.pas
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ea8774c18d
* split the sparc code generator into a generic base class and separate classes for sparc32 and sparc64
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8 years ago |
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cpuelf.pas
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901275b4a1
Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen).
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10 years ago |
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cpuinfo.pas
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3cb9be73bc
Moved tcontrollerdatatype out into cpuinfo.
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10 years ago |
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cpunode.pas
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a0efde8167
* automatically generate necessary indirect symbols when a new assembler
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9 years ago |
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cpupara.pas
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1f4432af6b
* sparc64 compiler can be build, not working yet
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8 years ago |
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cputarg.pas
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7587145320
Add possibility to test sparc elf generator with -dTEST_AGSPARC_ELF
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13 years ago |
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rspcon.inc
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c321fb35f1
* integer registers on sparc(64) do not have an explicit size anymore, simplifies compiler code sharing between sparc32 and sparc64
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8 years ago |
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rspdwrf.inc
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c3da1aa542
Reenabled D0-D30 registers
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13 years ago |
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rspnor.inc
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c3da1aa542
Reenabled D0-D30 registers
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13 years ago |
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rspnum.inc
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c3da1aa542
Reenabled D0-D30 registers
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13 years ago |
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rsprni.inc
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c321fb35f1
* integer registers on sparc(64) do not have an explicit size anymore, simplifies compiler code sharing between sparc32 and sparc64
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8 years ago |
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rspsri.inc
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c3da1aa542
Reenabled D0-D30 registers
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13 years ago |
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rspstab.inc
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c3da1aa542
Reenabled D0-D30 registers
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13 years ago |
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rspstd.inc
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c3da1aa542
Reenabled D0-D30 registers
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13 years ago |
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rspsup.inc
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c3da1aa542
Reenabled D0-D30 registers
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13 years ago |
florian
c321fb35f1
* integer registers on sparc(64) do not have an explicit size anymore, simplifies compiler code sharing between sparc32 and sparc64