cgcpu.pas 66 KB

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  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. function getaddressregister(list:TAsmList):TRegister;override;
  36. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);override;
  37. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  39. procedure a_load_reg_cgpara(list : TAsmList; size : tcgsize;r : tregister; const cgpara : tcgpara);override;
  40. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  41. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  42. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); override;
  43. procedure a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister); override;
  44. { move instructions }
  45. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);override;
  46. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  47. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  48. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  49. { fpu move instructions }
  50. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister); override;
  51. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); override;
  52. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); override;
  53. { comparison operations }
  54. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  55. l : tasmlabel);override;
  56. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  57. procedure a_jmp_name(list : TAsmList;const s : string); override;
  58. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  59. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  60. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  61. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  62. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  63. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  64. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);override;
  65. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  66. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  67. procedure g_save_registers(list : TAsmList);override;
  68. procedure g_restore_registers(list : TAsmList);override;
  69. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  70. procedure fixref(list : TAsmList;var ref : treference);
  71. function normalize_ref(list : TAsmList;ref : treference;
  72. tmpreg : tregister) : treference;
  73. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  74. procedure a_adjust_sp(list: TAsmList; value: longint);
  75. function GetLoad(const ref : treference) : tasmop;
  76. function GetStore(const ref: treference): tasmop;
  77. protected
  78. procedure a_op_reg_reg_internal(list: TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  79. procedure a_op_const_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg, reghi: TRegister);
  80. end;
  81. tcg64favr = class(tcg64f32)
  82. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  83. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  84. end;
  85. procedure create_codegen;
  86. const
  87. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  88. A_NONE,A_MULS,A_MUL,A_NEG,A_COM,A_OR,
  89. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  90. implementation
  91. uses
  92. globals,verbose,systems,cutils,
  93. fmodule,
  94. symconst,symsym,symtable,
  95. tgobj,rgobj,
  96. procinfo,cpupi,
  97. paramgr;
  98. procedure tcgavr.init_register_allocators;
  99. begin
  100. inherited init_register_allocators;
  101. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  102. [RS_R18,RS_R19,RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25,
  103. RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7,RS_R8,RS_R9,
  104. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17],first_int_imreg,[]);
  105. end;
  106. procedure tcgavr.done_register_allocators;
  107. begin
  108. rg[R_INTREGISTER].free;
  109. // rg[R_ADDRESSREGISTER].free;
  110. inherited done_register_allocators;
  111. end;
  112. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  113. var
  114. tmp1,tmp2,tmp3 : TRegister;
  115. begin
  116. case size of
  117. OS_8,OS_S8:
  118. Result:=inherited getintregister(list, size);
  119. OS_16,OS_S16:
  120. begin
  121. Result:=inherited getintregister(list, OS_8);
  122. { ensure that the high register can be retrieved by
  123. GetNextReg
  124. }
  125. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  126. internalerror(2011021331);
  127. end;
  128. OS_32,OS_S32:
  129. begin
  130. Result:=inherited getintregister(list, OS_8);
  131. tmp1:=inherited getintregister(list, OS_8);
  132. { ensure that the high register can be retrieved by
  133. GetNextReg
  134. }
  135. if tmp1<>GetNextReg(Result) then
  136. internalerror(2011021332);
  137. tmp2:=inherited getintregister(list, OS_8);
  138. { ensure that the upper register can be retrieved by
  139. GetNextReg
  140. }
  141. if tmp2<>GetNextReg(tmp1) then
  142. internalerror(2011021333);
  143. tmp3:=inherited getintregister(list, OS_8);
  144. { ensure that the upper register can be retrieved by
  145. GetNextReg
  146. }
  147. if tmp3<>GetNextReg(tmp2) then
  148. internalerror(2011021334);
  149. end;
  150. else
  151. internalerror(2011021330);
  152. end;
  153. end;
  154. function tcgavr.getaddressregister(list: TAsmList): TRegister;
  155. begin
  156. Result:=getintregister(list,OS_ADDR);
  157. end;
  158. procedure tcgavr.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : tcgpara);
  159. procedure load_para_loc(r : TRegister;paraloc : PCGParaLocation);
  160. var
  161. ref : treference;
  162. begin
  163. paramanager.allocparaloc(list,paraloc);
  164. case paraloc^.loc of
  165. LOC_REGISTER,LOC_CREGISTER:
  166. a_load_reg_reg(list,paraloc^.size,paraloc^.size,r,paraloc^.register);
  167. LOC_REFERENCE,LOC_CREFERENCE:
  168. begin
  169. reference_reset_base(ref,paraloc^.reference.index,paraloc^.reference.offset,2);
  170. a_load_reg_ref(list,paraloc^.size,paraloc^.size,r,ref);
  171. end;
  172. else
  173. internalerror(2002071004);
  174. end;
  175. end;
  176. var
  177. i, i2 : longint;
  178. hp : PCGParaLocation;
  179. begin
  180. { if use_push(cgpara) then
  181. begin
  182. if tcgsize2size[cgpara.Size] > 2 then
  183. begin
  184. if tcgsize2size[cgpara.Size] <> 4 then
  185. internalerror(2013031101);
  186. if cgpara.location^.Next = nil then
  187. begin
  188. if tcgsize2size[cgpara.location^.size] <> 4 then
  189. internalerror(2013031101);
  190. end
  191. else
  192. begin
  193. if tcgsize2size[cgpara.location^.size] <> 2 then
  194. internalerror(2013031101);
  195. if tcgsize2size[cgpara.location^.Next^.size] <> 2 then
  196. internalerror(2013031101);
  197. if cgpara.location^.Next^.Next <> nil then
  198. internalerror(2013031101);
  199. end;
  200. if tcgsize2size[cgpara.size]>cgpara.alignment then
  201. pushsize:=cgpara.size
  202. else
  203. pushsize:=int_cgsize(cgpara.alignment);
  204. pushsize2 := int_cgsize(tcgsize2size[pushsize] - 2);
  205. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize2],makeregsize(list,GetNextReg(r),pushsize2)));
  206. list.concat(taicpu.op_reg(A_PUSH,S_W,makeregsize(list,r,OS_16)));
  207. end
  208. else
  209. begin
  210. cgpara.check_simple_location;
  211. if tcgsize2size[cgpara.location^.size]>cgpara.alignment then
  212. pushsize:=cgpara.location^.size
  213. else
  214. pushsize:=int_cgsize(cgpara.alignment);
  215. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize],makeregsize(list,r,pushsize)));
  216. end;
  217. end
  218. else }
  219. begin
  220. if not(tcgsize2size[cgpara.Size] in [1..4]) then
  221. internalerror(2014011101);
  222. hp:=cgpara.location;
  223. i:=0;
  224. while i<tcgsize2size[cgpara.Size] do
  225. begin
  226. if not(assigned(hp)) then
  227. internalerror(2014011102);
  228. inc(i, tcgsize2size[hp^.Size]);
  229. if hp^.Loc=LOC_REGISTER then
  230. begin
  231. load_para_loc(r,hp);
  232. hp:=hp^.Next;
  233. r:=GetNextReg(r);
  234. end
  235. else
  236. begin
  237. load_para_loc(r,hp);
  238. for i2:=1 to tcgsize2size[hp^.Size] do
  239. r:=GetNextReg(r);
  240. hp:=hp^.Next;
  241. end;
  242. end;
  243. if assigned(hp) then
  244. internalerror(2014011103);
  245. end;
  246. end;
  247. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);
  248. var
  249. i : longint;
  250. hp : PCGParaLocation;
  251. begin
  252. if not(tcgsize2size[paraloc.Size] in [1..4]) then
  253. internalerror(2014011101);
  254. hp:=paraloc.location;
  255. for i:=1 to tcgsize2size[paraloc.Size] do
  256. begin
  257. if not(assigned(hp)) or
  258. (tcgsize2size[hp^.size]<>1) or
  259. (hp^.shiftval<>0) then
  260. internalerror(2014011105);
  261. case hp^.loc of
  262. LOC_REGISTER,LOC_CREGISTER:
  263. a_load_const_reg(list,hp^.size,(a shr (8*(i-1))) and $ff,hp^.register);
  264. LOC_REFERENCE,LOC_CREFERENCE:
  265. begin
  266. list.concat(taicpu.op_const(A_PUSH,(a shr (8*(i-1))) and $ff));
  267. end;
  268. else
  269. internalerror(2002071004);
  270. end;
  271. hp:=hp^.Next;
  272. end;
  273. if assigned(hp) then
  274. internalerror(2014011104);
  275. end;
  276. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  277. var
  278. tmpref, ref: treference;
  279. location: pcgparalocation;
  280. sizeleft: tcgint;
  281. begin
  282. location := paraloc.location;
  283. tmpref := r;
  284. sizeleft := paraloc.intsize;
  285. while assigned(location) do
  286. begin
  287. paramanager.allocparaloc(list,location);
  288. case location^.loc of
  289. LOC_REGISTER,LOC_CREGISTER:
  290. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  291. LOC_REFERENCE:
  292. begin
  293. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  294. { doubles in softemu mode have a strange order of registers and references }
  295. if location^.size=OS_32 then
  296. g_concatcopy(list,tmpref,ref,4)
  297. else
  298. begin
  299. g_concatcopy(list,tmpref,ref,sizeleft);
  300. if assigned(location^.next) then
  301. internalerror(2005010710);
  302. end;
  303. end;
  304. LOC_VOID:
  305. begin
  306. // nothing to do
  307. end;
  308. else
  309. internalerror(2002081103);
  310. end;
  311. inc(tmpref.offset,tcgsize2size[location^.size]);
  312. dec(sizeleft,tcgsize2size[location^.size]);
  313. location := location^.next;
  314. end;
  315. end;
  316. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  317. var
  318. tmpreg: tregister;
  319. begin
  320. tmpreg:=getaddressregister(list);
  321. a_loadaddr_ref_reg(list,r,tmpreg);
  322. a_load_reg_cgpara(list,OS_ADDR,tmpreg,paraloc);
  323. end;
  324. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  325. begin
  326. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  327. list.concat(taicpu.op_sym(A_CALL,current_asmdata.RefAsmSymbol(s)))
  328. else
  329. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  330. include(current_procinfo.flags,pi_do_call);
  331. end;
  332. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  333. begin
  334. a_reg_alloc(list,NR_ZLO);
  335. a_reg_alloc(list,NR_ZHI);
  336. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  337. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  338. list.concat(taicpu.op_none(A_ICALL));
  339. a_reg_dealloc(list,NR_ZLO);
  340. a_reg_dealloc(list,NR_ZHI);
  341. include(current_procinfo.flags,pi_do_call);
  342. end;
  343. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister);
  344. begin
  345. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  346. internalerror(2012102403);
  347. a_op_const_reg_internal(list,Op,size,a,reg,NR_NO);
  348. end;
  349. procedure tcgavr.a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister);
  350. begin
  351. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  352. internalerror(2012102401);
  353. a_op_reg_reg_internal(list,Op,size,src,NR_NO,dst,NR_NO);
  354. end;
  355. procedure tcgavr.a_op_reg_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  356. var
  357. countreg,
  358. tmpreg: tregister;
  359. i : integer;
  360. instr : taicpu;
  361. paraloc1,paraloc2,paraloc3 : TCGPara;
  362. l1,l2 : tasmlabel;
  363. pd : tprocdef;
  364. procedure NextSrcDst;
  365. begin
  366. if i=5 then
  367. begin
  368. dst:=dsthi;
  369. src:=srchi;
  370. end
  371. else
  372. begin
  373. dst:=GetNextReg(dst);
  374. src:=GetNextReg(src);
  375. end;
  376. end;
  377. { iterates TmpReg through all registers of dst }
  378. procedure NextTmp;
  379. begin
  380. if i=5 then
  381. tmpreg:=dsthi
  382. else
  383. tmpreg:=GetNextReg(tmpreg);
  384. end;
  385. begin
  386. case op of
  387. OP_ADD:
  388. begin
  389. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  390. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  391. begin
  392. for i:=2 to tcgsize2size[size] do
  393. begin
  394. NextSrcDst;
  395. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  396. end;
  397. end;
  398. end;
  399. OP_SUB:
  400. begin
  401. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  402. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  403. begin
  404. for i:=2 to tcgsize2size[size] do
  405. begin
  406. NextSrcDst;
  407. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  408. end;
  409. end;
  410. end;
  411. OP_NEG:
  412. begin
  413. if src<>dst then
  414. begin
  415. if size in [OS_S64,OS_64] then
  416. begin
  417. a_load_reg_reg(list,OS_32,OS_32,src,dst);
  418. a_load_reg_reg(list,OS_32,OS_32,srchi,dsthi);
  419. end
  420. else
  421. a_load_reg_reg(list,size,size,src,dst);
  422. end;
  423. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  424. begin
  425. tmpreg:=GetNextReg(dst);
  426. for i:=2 to tcgsize2size[size] do
  427. begin
  428. list.concat(taicpu.op_reg(A_COM,tmpreg));
  429. NextTmp;
  430. end;
  431. list.concat(taicpu.op_reg(A_NEG,dst));
  432. tmpreg:=GetNextReg(dst);
  433. for i:=2 to tcgsize2size[size] do
  434. begin
  435. list.concat(taicpu.op_reg_const(A_SBCI,tmpreg,-1));
  436. NextTmp;
  437. end;
  438. end;
  439. end;
  440. OP_NOT:
  441. begin
  442. for i:=1 to tcgsize2size[size] do
  443. begin
  444. if src<>dst then
  445. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  446. list.concat(taicpu.op_reg(A_COM,dst));
  447. NextSrcDst;
  448. end;
  449. end;
  450. OP_MUL,OP_IMUL:
  451. begin
  452. if size in [OS_8,OS_S8] then
  453. begin
  454. getcpuregister(list,NR_R0);
  455. getcpuregister(list,NR_R1);
  456. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  457. ungetcpuregister(list,NR_R1);
  458. list.concat(taicpu.op_reg_reg(A_MOV,dst,NR_R0));
  459. ungetcpuregister(list,NR_R0);
  460. end
  461. else if size=OS_16 then
  462. begin
  463. pd:=search_system_proc('fpc_mul_word');
  464. paraloc1.init;
  465. paraloc2.init;
  466. paraloc3.init;
  467. paramanager.getintparaloc(list,pd,1,paraloc1);
  468. paramanager.getintparaloc(list,pd,2,paraloc2);
  469. paramanager.getintparaloc(list,pd,3,paraloc3);
  470. a_load_const_cgpara(list,OS_8,0,paraloc3);
  471. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  472. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  473. paramanager.freecgpara(list,paraloc3);
  474. paramanager.freecgpara(list,paraloc2);
  475. paramanager.freecgpara(list,paraloc1);
  476. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  477. a_call_name(list,'FPC_MUL_WORD',false);
  478. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  479. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  480. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT_REG,dst);
  481. paraloc3.done;
  482. paraloc2.done;
  483. paraloc1.done;
  484. end
  485. else
  486. internalerror(2011022002);
  487. end;
  488. OP_DIV,OP_IDIV:
  489. { special stuff, needs separate handling inside code }
  490. { generator }
  491. internalerror(2011022001);
  492. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  493. begin
  494. current_asmdata.getjumplabel(l1);
  495. current_asmdata.getjumplabel(l2);
  496. countreg:=getintregister(list,OS_8);
  497. a_load_reg_reg(list,size,OS_8,src,countreg);
  498. list.concat(taicpu.op_reg_const(A_CPI,countreg,0));
  499. a_jmp_flags(list,F_EQ,l2);
  500. cg.a_label(list,l1);
  501. case op of
  502. OP_SHR:
  503. list.concat(taicpu.op_reg(A_LSR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  504. OP_SHL:
  505. list.concat(taicpu.op_reg(A_LSL,dst));
  506. OP_SAR:
  507. list.concat(taicpu.op_reg(A_ASR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  508. OP_ROR:
  509. begin
  510. { load carry? }
  511. if not(size in [OS_8,OS_S8]) then
  512. begin
  513. list.concat(taicpu.op_none(A_CLC));
  514. list.concat(taicpu.op_reg_const(A_SBRC,src,0));
  515. list.concat(taicpu.op_none(A_SEC));
  516. end;
  517. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  518. end;
  519. OP_ROL:
  520. begin
  521. { load carry? }
  522. if not(size in [OS_8,OS_S8]) then
  523. begin
  524. list.concat(taicpu.op_none(A_CLC));
  525. list.concat(taicpu.op_reg_const(A_SBRC,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1),7));
  526. list.concat(taicpu.op_none(A_SEC));
  527. end;
  528. list.concat(taicpu.op_reg(A_ROL,dst))
  529. end;
  530. else
  531. internalerror(2011030901);
  532. end;
  533. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  534. begin
  535. for i:=2 to tcgsize2size[size] do
  536. begin
  537. case op of
  538. OP_ROR,
  539. OP_SHR:
  540. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  541. OP_ROL,
  542. OP_SHL:
  543. list.concat(taicpu.op_reg(A_ROL,GetOffsetReg64(dst,dsthi,i-1)));
  544. OP_SAR:
  545. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  546. else
  547. internalerror(2011030902);
  548. end;
  549. end;
  550. end;
  551. a_op_const_reg(list,OP_SUB,OS_8,1,countreg);
  552. a_jmp_flags(list,F_NE,l1);
  553. // keep registers alive
  554. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  555. cg.a_label(list,l2);
  556. end;
  557. OP_AND,OP_OR,OP_XOR:
  558. begin
  559. for i:=1 to tcgsize2size[size] do
  560. begin
  561. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  562. NextSrcDst;
  563. end;
  564. end;
  565. else
  566. internalerror(2011022004);
  567. end;
  568. end;
  569. procedure tcgavr.a_op_const_reg_internal(list: TAsmList; Op: TOpCG;
  570. size: TCGSize; a: tcgint; reg, reghi: TRegister);
  571. var
  572. mask : qword;
  573. shift : byte;
  574. i : byte;
  575. tmpreg : tregister;
  576. tmpreg64 : tregister64;
  577. procedure NextReg;
  578. begin
  579. if i=5 then
  580. reg:=reghi
  581. else
  582. reg:=GetNextReg(reg);
  583. end;
  584. begin
  585. mask:=$ff;
  586. shift:=0;
  587. case op of
  588. OP_OR:
  589. begin
  590. for i:=1 to tcgsize2size[size] do
  591. begin
  592. list.concat(taicpu.op_reg_const(A_ORI,reg,(qword(a) and mask) shr shift));
  593. NextReg;
  594. mask:=mask shl 8;
  595. inc(shift,8);
  596. end;
  597. end;
  598. OP_AND:
  599. begin
  600. for i:=1 to tcgsize2size[size] do
  601. begin
  602. list.concat(taicpu.op_reg_const(A_ANDI,reg,(qword(a) and mask) shr shift));
  603. NextReg;
  604. mask:=mask shl 8;
  605. inc(shift,8);
  606. end;
  607. end;
  608. OP_SUB:
  609. begin
  610. list.concat(taicpu.op_reg_const(A_SUBI,reg,a and mask));
  611. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  612. begin
  613. for i:=2 to tcgsize2size[size] do
  614. begin
  615. NextReg;
  616. mask:=mask shl 8;
  617. inc(shift,8);
  618. list.concat(taicpu.op_reg_const(A_SBCI,reg,(qword(a) and mask) shr shift));
  619. end;
  620. end;
  621. end;
  622. {OP_ADD:
  623. begin
  624. list.concat(taicpu.op_reg_const(A_SUBI,reg,(-a) and mask));
  625. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  626. begin
  627. for i:=2 to tcgsize2size[size] do
  628. begin
  629. NextReg;
  630. mask:=mask shl 8;
  631. inc(shift,8);
  632. list.concat(taicpu.op_reg_const(A_ADC,reg,(a and mask) shr shift));
  633. end;
  634. end;
  635. end; }
  636. else
  637. begin
  638. if size in [OS_64,OS_S64] then
  639. begin
  640. tmpreg64.reglo:=getintregister(list,OS_32);
  641. tmpreg64.reghi:=getintregister(list,OS_32);
  642. cg64.a_load64_const_reg(list,a,tmpreg64);
  643. cg64.a_op64_reg_reg(list,op,size,tmpreg64,joinreg64(reg,reghi));
  644. end
  645. else
  646. begin
  647. tmpreg:=getintregister(list,size);
  648. a_load_const_reg(list,size,a,tmpreg);
  649. a_op_reg_reg(list,op,size,tmpreg,reg);
  650. end;
  651. end;
  652. end;
  653. end;
  654. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);
  655. var
  656. mask : qword;
  657. shift : byte;
  658. i : byte;
  659. begin
  660. mask:=$ff;
  661. shift:=0;
  662. for i:=1 to tcgsize2size[size] do
  663. begin
  664. if ((qword(a) and mask) shr shift)=0 then
  665. emit_mov(list,reg,NR_R1)
  666. else
  667. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  668. mask:=mask shl 8;
  669. inc(shift,8);
  670. reg:=GetNextReg(reg);
  671. end;
  672. end;
  673. function tcgavr.normalize_ref(list:TAsmList;ref: treference;tmpreg : tregister) : treference;
  674. procedure maybegetcpuregister(list:tasmlist;reg : tregister);
  675. begin
  676. { allocate the register only, if a cpu register is passed }
  677. if getsupreg(reg)<first_int_imreg then
  678. getcpuregister(list,reg);
  679. end;
  680. var
  681. tmpref : treference;
  682. l : tasmlabel;
  683. begin
  684. Result:=ref;
  685. if ref.addressmode<>AM_UNCHANGED then
  686. internalerror(2011021701);
  687. { Be sure to have a base register }
  688. if (ref.base=NR_NO) then
  689. begin
  690. { only symbol+offset? }
  691. if ref.index=NR_NO then
  692. exit;
  693. ref.base:=ref.index;
  694. ref.index:=NR_NO;
  695. end;
  696. if assigned(ref.symbol) or (ref.offset<>0) then
  697. begin
  698. reference_reset(tmpref,0);
  699. tmpref.symbol:=ref.symbol;
  700. tmpref.offset:=ref.offset;
  701. tmpref.refaddr:=addr_lo8;
  702. maybegetcpuregister(list,tmpreg);
  703. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  704. tmpref.refaddr:=addr_hi8;
  705. maybegetcpuregister(list,GetNextReg(tmpreg));
  706. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  707. if (ref.base<>NR_NO) then
  708. begin
  709. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  710. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  711. end;
  712. if (ref.index<>NR_NO) then
  713. begin
  714. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  715. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  716. end;
  717. ref.symbol:=nil;
  718. ref.offset:=0;
  719. ref.base:=tmpreg;
  720. ref.index:=NR_NO;
  721. end
  722. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  723. begin
  724. maybegetcpuregister(list,tmpreg);
  725. emit_mov(list,tmpreg,ref.base);
  726. maybegetcpuregister(list,GetNextReg(tmpreg));
  727. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  728. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  729. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  730. ref.base:=tmpreg;
  731. ref.index:=NR_NO;
  732. end
  733. else if (ref.base<>NR_NO) then
  734. begin
  735. maybegetcpuregister(list,tmpreg);
  736. emit_mov(list,tmpreg,ref.base);
  737. maybegetcpuregister(list,GetNextReg(tmpreg));
  738. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  739. ref.base:=tmpreg;
  740. ref.index:=NR_NO;
  741. end
  742. else if (ref.index<>NR_NO) then
  743. begin
  744. maybegetcpuregister(list,tmpreg);
  745. emit_mov(list,tmpreg,ref.index);
  746. maybegetcpuregister(list,GetNextReg(tmpreg));
  747. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  748. ref.base:=tmpreg;
  749. ref.index:=NR_NO;
  750. end;
  751. Result:=ref;
  752. end;
  753. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  754. var
  755. href : treference;
  756. conv_done: boolean;
  757. tmpreg : tregister;
  758. i : integer;
  759. QuickRef : Boolean;
  760. begin
  761. QuickRef:=false;
  762. if not((Ref.addressmode=AM_UNCHANGED) and
  763. (Ref.symbol=nil) and
  764. ((Ref.base=NR_R28) or
  765. (Ref.base=NR_R29)) and
  766. (Ref.Index=NR_No) and
  767. (Ref.Offset in [0..64-tcgsize2size[tosize]])) and
  768. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  769. href:=normalize_ref(list,Ref,NR_R30)
  770. else
  771. begin
  772. QuickRef:=true;
  773. href:=Ref;
  774. end;
  775. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  776. internalerror(2011021307);
  777. conv_done:=false;
  778. if tosize<>fromsize then
  779. begin
  780. conv_done:=true;
  781. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  782. fromsize:=tosize;
  783. case fromsize of
  784. OS_8:
  785. begin
  786. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  787. href.addressmode:=AM_POSTINCREMENT;
  788. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  789. for i:=2 to tcgsize2size[tosize] do
  790. begin
  791. if QuickRef then
  792. inc(href.offset);
  793. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  794. href.addressmode:=AM_POSTINCREMENT
  795. else
  796. href.addressmode:=AM_UNCHANGED;
  797. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  798. end;
  799. end;
  800. OS_S8:
  801. begin
  802. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  803. href.addressmode:=AM_POSTINCREMENT;
  804. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  805. if tcgsize2size[tosize]>1 then
  806. begin
  807. tmpreg:=getintregister(list,OS_8);
  808. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  809. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  810. list.concat(taicpu.op_reg(A_COM,tmpreg));
  811. for i:=2 to tcgsize2size[tosize] do
  812. begin
  813. if QuickRef then
  814. inc(href.offset);
  815. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  816. href.addressmode:=AM_POSTINCREMENT
  817. else
  818. href.addressmode:=AM_UNCHANGED;
  819. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  820. end;
  821. end;
  822. end;
  823. OS_16:
  824. begin
  825. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  826. href.addressmode:=AM_POSTINCREMENT;
  827. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  828. if QuickRef then
  829. inc(href.offset)
  830. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  831. href.addressmode:=AM_POSTINCREMENT
  832. else
  833. href.addressmode:=AM_UNCHANGED;
  834. reg:=GetNextReg(reg);
  835. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  836. for i:=3 to tcgsize2size[tosize] do
  837. begin
  838. if QuickRef then
  839. inc(href.offset);
  840. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  841. href.addressmode:=AM_POSTINCREMENT
  842. else
  843. href.addressmode:=AM_UNCHANGED;
  844. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  845. end;
  846. end;
  847. OS_S16:
  848. begin
  849. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  850. href.addressmode:=AM_POSTINCREMENT;
  851. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  852. if QuickRef then
  853. inc(href.offset)
  854. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  855. href.addressmode:=AM_POSTINCREMENT
  856. else
  857. href.addressmode:=AM_UNCHANGED;
  858. reg:=GetNextReg(reg);
  859. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  860. if tcgsize2size[tosize]>2 then
  861. begin
  862. tmpreg:=getintregister(list,OS_8);
  863. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  864. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  865. list.concat(taicpu.op_reg(A_COM,tmpreg));
  866. for i:=3 to tcgsize2size[tosize] do
  867. begin
  868. if QuickRef then
  869. inc(href.offset);
  870. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  871. href.addressmode:=AM_POSTINCREMENT
  872. else
  873. href.addressmode:=AM_UNCHANGED;
  874. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  875. end;
  876. end;
  877. end;
  878. else
  879. conv_done:=false;
  880. end;
  881. end;
  882. if not conv_done then
  883. begin
  884. for i:=1 to tcgsize2size[fromsize] do
  885. begin
  886. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  887. href.addressmode:=AM_POSTINCREMENT
  888. else
  889. href.addressmode:=AM_UNCHANGED;
  890. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  891. if QuickRef then
  892. inc(href.offset);
  893. reg:=GetNextReg(reg);
  894. end;
  895. end;
  896. if not(QuickRef) then
  897. begin
  898. ungetcpuregister(list,href.base);
  899. ungetcpuregister(list,GetNextReg(href.base));
  900. end;
  901. end;
  902. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  903. const Ref : treference;reg : tregister);
  904. var
  905. href : treference;
  906. conv_done: boolean;
  907. tmpreg : tregister;
  908. i : integer;
  909. QuickRef : boolean;
  910. begin
  911. QuickRef:=false;
  912. if not((Ref.addressmode=AM_UNCHANGED) and
  913. (Ref.symbol=nil) and
  914. ((Ref.base=NR_R28) or
  915. (Ref.base=NR_R29)) and
  916. (Ref.Index=NR_No) and
  917. (Ref.Offset in [0..64-tcgsize2size[fromsize]])) and
  918. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  919. href:=normalize_ref(list,Ref,NR_R30)
  920. else
  921. begin
  922. QuickRef:=true;
  923. href:=Ref;
  924. end;
  925. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  926. internalerror(2011021307);
  927. conv_done:=false;
  928. if tosize<>fromsize then
  929. begin
  930. conv_done:=true;
  931. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  932. fromsize:=tosize;
  933. case fromsize of
  934. OS_8:
  935. begin
  936. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  937. for i:=2 to tcgsize2size[tosize] do
  938. begin
  939. reg:=GetNextReg(reg);
  940. list.concat(taicpu.op_reg(A_CLR,reg));
  941. end;
  942. end;
  943. OS_S8:
  944. begin
  945. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  946. tmpreg:=reg;
  947. if tcgsize2size[tosize]>1 then
  948. begin
  949. reg:=GetNextReg(reg);
  950. list.concat(taicpu.op_reg(A_CLR,reg));
  951. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  952. list.concat(taicpu.op_reg(A_COM,reg));
  953. tmpreg:=reg;
  954. for i:=3 to tcgsize2size[tosize] do
  955. begin
  956. reg:=GetNextReg(reg);
  957. emit_mov(list,reg,tmpreg);
  958. end;
  959. end;
  960. end;
  961. OS_16:
  962. begin
  963. if not(QuickRef) then
  964. href.addressmode:=AM_POSTINCREMENT;
  965. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  966. if QuickRef then
  967. inc(href.offset);
  968. href.addressmode:=AM_UNCHANGED;
  969. reg:=GetNextReg(reg);
  970. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  971. for i:=3 to tcgsize2size[tosize] do
  972. begin
  973. reg:=GetNextReg(reg);
  974. list.concat(taicpu.op_reg(A_CLR,reg));
  975. end;
  976. end;
  977. OS_S16:
  978. begin
  979. if not(QuickRef) then
  980. href.addressmode:=AM_POSTINCREMENT;
  981. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  982. if QuickRef then
  983. inc(href.offset);
  984. href.addressmode:=AM_UNCHANGED;
  985. reg:=GetNextReg(reg);
  986. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  987. tmpreg:=reg;
  988. reg:=GetNextReg(reg);
  989. list.concat(taicpu.op_reg(A_CLR,reg));
  990. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  991. list.concat(taicpu.op_reg(A_COM,reg));
  992. tmpreg:=reg;
  993. for i:=4 to tcgsize2size[tosize] do
  994. begin
  995. reg:=GetNextReg(reg);
  996. emit_mov(list,reg,tmpreg);
  997. end;
  998. end;
  999. else
  1000. conv_done:=false;
  1001. end;
  1002. end;
  1003. if not conv_done then
  1004. begin
  1005. for i:=1 to tcgsize2size[fromsize] do
  1006. begin
  1007. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  1008. href.addressmode:=AM_POSTINCREMENT
  1009. else
  1010. href.addressmode:=AM_UNCHANGED;
  1011. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1012. if QuickRef then
  1013. inc(href.offset);
  1014. reg:=GetNextReg(reg);
  1015. end;
  1016. end;
  1017. if not(QuickRef) then
  1018. begin
  1019. ungetcpuregister(list,href.base);
  1020. ungetcpuregister(list,GetNextReg(href.base));
  1021. end;
  1022. end;
  1023. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  1024. var
  1025. conv_done: boolean;
  1026. tmpreg : tregister;
  1027. i : integer;
  1028. begin
  1029. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  1030. internalerror(2011021310);
  1031. conv_done:=false;
  1032. if tosize<>fromsize then
  1033. begin
  1034. conv_done:=true;
  1035. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  1036. fromsize:=tosize;
  1037. case fromsize of
  1038. OS_8:
  1039. begin
  1040. emit_mov(list,reg2,reg1);
  1041. for i:=2 to tcgsize2size[tosize] do
  1042. begin
  1043. reg2:=GetNextReg(reg2);
  1044. list.concat(taicpu.op_reg(A_CLR,reg2));
  1045. end;
  1046. end;
  1047. OS_S8:
  1048. begin
  1049. emit_mov(list,reg2,reg1);
  1050. if tcgsize2size[tosize]>1 then
  1051. begin
  1052. reg2:=GetNextReg(reg2);
  1053. list.concat(taicpu.op_reg(A_CLR,reg2));
  1054. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1055. list.concat(taicpu.op_reg(A_COM,reg2));
  1056. tmpreg:=reg2;
  1057. for i:=3 to tcgsize2size[tosize] do
  1058. begin
  1059. reg2:=GetNextReg(reg2);
  1060. emit_mov(list,reg2,tmpreg);
  1061. end;
  1062. end;
  1063. end;
  1064. OS_16:
  1065. begin
  1066. emit_mov(list,reg2,reg1);
  1067. reg1:=GetNextReg(reg1);
  1068. reg2:=GetNextReg(reg2);
  1069. emit_mov(list,reg2,reg1);
  1070. for i:=3 to tcgsize2size[tosize] do
  1071. begin
  1072. reg2:=GetNextReg(reg2);
  1073. list.concat(taicpu.op_reg(A_CLR,reg2));
  1074. end;
  1075. end;
  1076. OS_S16:
  1077. begin
  1078. emit_mov(list,reg2,reg1);
  1079. reg1:=GetNextReg(reg1);
  1080. reg2:=GetNextReg(reg2);
  1081. emit_mov(list,reg2,reg1);
  1082. if tcgsize2size[tosize]>2 then
  1083. begin
  1084. reg2:=GetNextReg(reg2);
  1085. list.concat(taicpu.op_reg(A_CLR,reg2));
  1086. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1087. list.concat(taicpu.op_reg(A_COM,reg2));
  1088. tmpreg:=reg2;
  1089. for i:=4 to tcgsize2size[tosize] do
  1090. begin
  1091. reg2:=GetNextReg(reg2);
  1092. emit_mov(list,reg2,tmpreg);
  1093. end;
  1094. end;
  1095. end;
  1096. else
  1097. conv_done:=false;
  1098. end;
  1099. end;
  1100. if not conv_done and (reg1<>reg2) then
  1101. begin
  1102. for i:=1 to tcgsize2size[fromsize] do
  1103. begin
  1104. emit_mov(list,reg2,reg1);
  1105. reg1:=GetNextReg(reg1);
  1106. reg2:=GetNextReg(reg2);
  1107. end;
  1108. end;
  1109. end;
  1110. procedure tcgavr.a_loadfpu_reg_reg(list: TAsmList; fromsize,tosize: tcgsize; reg1, reg2: tregister);
  1111. begin
  1112. internalerror(2012010702);
  1113. end;
  1114. procedure tcgavr.a_loadfpu_ref_reg(list: TAsmList; fromsize,tosize: tcgsize; const ref: treference; reg: tregister);
  1115. begin
  1116. internalerror(2012010703);
  1117. end;
  1118. procedure tcgavr.a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference);
  1119. begin
  1120. internalerror(2012010704);
  1121. end;
  1122. { comparison operations }
  1123. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;
  1124. cmp_op : topcmp;a : tcgint;reg : tregister;l : tasmlabel);
  1125. var
  1126. swapped : boolean;
  1127. tmpreg : tregister;
  1128. i : byte;
  1129. begin
  1130. if a=0 then
  1131. begin
  1132. swapped:=false;
  1133. { swap parameters? }
  1134. case cmp_op of
  1135. OC_GT:
  1136. begin
  1137. swapped:=true;
  1138. cmp_op:=OC_LT;
  1139. end;
  1140. OC_LTE:
  1141. begin
  1142. swapped:=true;
  1143. cmp_op:=OC_GTE;
  1144. end;
  1145. OC_BE:
  1146. begin
  1147. swapped:=true;
  1148. cmp_op:=OC_AE;
  1149. end;
  1150. OC_A:
  1151. begin
  1152. swapped:=true;
  1153. cmp_op:=OC_B;
  1154. end;
  1155. end;
  1156. if swapped then
  1157. list.concat(taicpu.op_reg_reg(A_CP,reg,NR_R1))
  1158. else
  1159. list.concat(taicpu.op_reg_reg(A_CP,NR_R1,reg));
  1160. for i:=2 to tcgsize2size[size] do
  1161. begin
  1162. reg:=GetNextReg(reg);
  1163. if swapped then
  1164. list.concat(taicpu.op_reg_reg(A_CPC,reg,NR_R1))
  1165. else
  1166. list.concat(taicpu.op_reg_reg(A_CPC,NR_R1,reg));
  1167. end;
  1168. a_jmp_cond(list,cmp_op,l);
  1169. end
  1170. else
  1171. inherited a_cmp_const_reg_label(list,size,cmp_op,a,reg,l);
  1172. end;
  1173. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;
  1174. cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  1175. var
  1176. swapped : boolean;
  1177. tmpreg : tregister;
  1178. i : byte;
  1179. begin
  1180. swapped:=false;
  1181. { swap parameters? }
  1182. case cmp_op of
  1183. OC_GT:
  1184. begin
  1185. swapped:=true;
  1186. cmp_op:=OC_LT;
  1187. end;
  1188. OC_LTE:
  1189. begin
  1190. swapped:=true;
  1191. cmp_op:=OC_GTE;
  1192. end;
  1193. OC_BE:
  1194. begin
  1195. swapped:=true;
  1196. cmp_op:=OC_AE;
  1197. end;
  1198. OC_A:
  1199. begin
  1200. swapped:=true;
  1201. cmp_op:=OC_B;
  1202. end;
  1203. end;
  1204. if swapped then
  1205. begin
  1206. tmpreg:=reg1;
  1207. reg1:=reg2;
  1208. reg2:=tmpreg;
  1209. end;
  1210. list.concat(taicpu.op_reg_reg(A_CP,reg2,reg1));
  1211. for i:=2 to tcgsize2size[size] do
  1212. begin
  1213. reg1:=GetNextReg(reg1);
  1214. reg2:=GetNextReg(reg2);
  1215. list.concat(taicpu.op_reg_reg(A_CPC,reg2,reg1));
  1216. end;
  1217. a_jmp_cond(list,cmp_op,l);
  1218. end;
  1219. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  1220. var
  1221. ai : taicpu;
  1222. begin
  1223. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  1224. ai:=taicpu.op_sym(A_JMP,current_asmdata.RefAsmSymbol(s))
  1225. else
  1226. ai:=taicpu.op_sym(A_RJMP,current_asmdata.RefAsmSymbol(s));
  1227. ai.is_jmp:=true;
  1228. list.concat(ai);
  1229. end;
  1230. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  1231. var
  1232. ai : taicpu;
  1233. begin
  1234. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  1235. ai:=taicpu.op_sym(A_JMP,l)
  1236. else
  1237. ai:=taicpu.op_sym(A_RJMP,l);
  1238. ai.is_jmp:=true;
  1239. list.concat(ai);
  1240. end;
  1241. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  1242. var
  1243. ai : taicpu;
  1244. begin
  1245. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  1246. ai.is_jmp:=true;
  1247. list.concat(ai);
  1248. end;
  1249. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  1250. var
  1251. l : TAsmLabel;
  1252. tmpflags : TResFlags;
  1253. begin
  1254. current_asmdata.getjumplabel(l);
  1255. {
  1256. if flags_to_cond(f) then
  1257. begin
  1258. tmpflags:=f;
  1259. inverse_flags(tmpflags);
  1260. list.concat(taicpu.op_reg(A_CLR,reg));
  1261. a_jmp_flags(list,tmpflags,l);
  1262. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1263. end
  1264. else
  1265. }
  1266. begin
  1267. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1268. a_jmp_flags(list,f,l);
  1269. list.concat(taicpu.op_reg(A_CLR,reg));
  1270. end;
  1271. cg.a_label(list,l);
  1272. end;
  1273. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  1274. var
  1275. i : integer;
  1276. begin
  1277. case value of
  1278. 0:
  1279. ;
  1280. {-14..-1:
  1281. begin
  1282. if ((-value) mod 2)<>0 then
  1283. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  1284. for i:=1 to (-value) div 2 do
  1285. list.concat(taicpu.op_const(A_RCALL,0));
  1286. end;
  1287. 1..7:
  1288. begin
  1289. for i:=1 to value do
  1290. list.concat(taicpu.op_reg(A_POP,NR_R0));
  1291. end;}
  1292. else
  1293. begin
  1294. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  1295. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  1296. // get SREG
  1297. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  1298. // block interrupts
  1299. list.concat(taicpu.op_none(A_CLI));
  1300. // write high SP
  1301. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  1302. // release interrupts
  1303. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  1304. // write low SP
  1305. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  1306. end;
  1307. end;
  1308. end;
  1309. function tcgavr.GetLoad(const ref: treference) : tasmop;
  1310. begin
  1311. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1312. result:=A_LDS
  1313. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1314. result:=A_LDD
  1315. else
  1316. result:=A_LD;
  1317. end;
  1318. function tcgavr.GetStore(const ref: treference) : tasmop;
  1319. begin
  1320. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1321. result:=A_STS
  1322. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1323. result:=A_STD
  1324. else
  1325. result:=A_ST;
  1326. end;
  1327. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  1328. var
  1329. regs : tcpuregisterset;
  1330. reg : tsuperregister;
  1331. begin
  1332. if not(nostackframe) then
  1333. begin
  1334. { save int registers }
  1335. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1336. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1337. regs:=regs+[RS_R28,RS_R29];
  1338. for reg:=RS_R31 downto RS_R0 do
  1339. if reg in regs then
  1340. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1341. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1342. begin
  1343. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  1344. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  1345. end
  1346. else
  1347. { the framepointer cannot be omitted on avr because sp
  1348. is not a register but part of the i/o map
  1349. }
  1350. internalerror(2011021901);
  1351. a_adjust_sp(list,-localsize);
  1352. end;
  1353. end;
  1354. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  1355. var
  1356. regs : tcpuregisterset;
  1357. reg : TSuperRegister;
  1358. LocalSize : longint;
  1359. begin
  1360. if not(nostackframe) then
  1361. begin
  1362. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1363. begin
  1364. LocalSize:=current_procinfo.calc_stackframe_size;
  1365. a_adjust_sp(list,LocalSize);
  1366. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1367. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1368. regs:=regs+[RS_R28,RS_R29];
  1369. for reg:=RS_R0 to RS_R31 do
  1370. if reg in regs then
  1371. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1372. end
  1373. else
  1374. { the framepointer cannot be omitted on avr because sp
  1375. is not a register but part of the i/o map
  1376. }
  1377. internalerror(2011021902);
  1378. end;
  1379. list.concat(taicpu.op_none(A_RET));
  1380. end;
  1381. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  1382. var
  1383. tmpref : treference;
  1384. begin
  1385. if ref.addressmode<>AM_UNCHANGED then
  1386. internalerror(2011021701);
  1387. if assigned(ref.symbol) or (ref.offset<>0) then
  1388. begin
  1389. reference_reset(tmpref,0);
  1390. tmpref.symbol:=ref.symbol;
  1391. tmpref.offset:=ref.offset;
  1392. tmpref.refaddr:=addr_lo8;
  1393. list.concat(taicpu.op_reg_ref(A_LDI,r,tmpref));
  1394. tmpref.refaddr:=addr_hi8;
  1395. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(r),tmpref));
  1396. if (ref.base<>NR_NO) then
  1397. begin
  1398. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.base));
  1399. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.base)));
  1400. end;
  1401. if (ref.index<>NR_NO) then
  1402. begin
  1403. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1404. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1405. end;
  1406. end
  1407. else if (ref.base<>NR_NO)then
  1408. begin
  1409. emit_mov(list,r,ref.base);
  1410. emit_mov(list,GetNextReg(r),GetNextReg(ref.base));
  1411. if (ref.index<>NR_NO) then
  1412. begin
  1413. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1414. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1415. end;
  1416. end
  1417. else if (ref.index<>NR_NO) then
  1418. begin
  1419. emit_mov(list,r,ref.index);
  1420. emit_mov(list,GetNextReg(r),GetNextReg(ref.index));
  1421. end;
  1422. end;
  1423. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  1424. begin
  1425. internalerror(2011021320);
  1426. end;
  1427. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  1428. var
  1429. paraloc1,paraloc2,paraloc3 : TCGPara;
  1430. pd : tprocdef;
  1431. begin
  1432. pd:=search_system_proc('MOVE');
  1433. paraloc1.init;
  1434. paraloc2.init;
  1435. paraloc3.init;
  1436. paramanager.getintparaloc(list,pd,1,paraloc1);
  1437. paramanager.getintparaloc(list,pd,2,paraloc2);
  1438. paramanager.getintparaloc(list,pd,3,paraloc3);
  1439. a_load_const_cgpara(list,OS_SINT,len,paraloc3);
  1440. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  1441. a_loadaddr_ref_cgpara(list,source,paraloc1);
  1442. paramanager.freecgpara(list,paraloc3);
  1443. paramanager.freecgpara(list,paraloc2);
  1444. paramanager.freecgpara(list,paraloc1);
  1445. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1446. a_call_name_static(list,'FPC_MOVE');
  1447. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1448. paraloc3.done;
  1449. paraloc2.done;
  1450. paraloc1.done;
  1451. end;
  1452. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);
  1453. var
  1454. countreg,tmpreg : tregister;
  1455. srcref,dstref : treference;
  1456. copysize,countregsize : tcgsize;
  1457. l : TAsmLabel;
  1458. i : longint;
  1459. SrcQuickRef, DestQuickRef : Boolean;
  1460. begin
  1461. if len>16 then
  1462. begin
  1463. current_asmdata.getjumplabel(l);
  1464. reference_reset(srcref,0);
  1465. reference_reset(dstref,0);
  1466. srcref.base:=NR_R30;
  1467. srcref.addressmode:=AM_POSTINCREMENT;
  1468. dstref.base:=NR_R26;
  1469. dstref.addressmode:=AM_POSTINCREMENT;
  1470. copysize:=OS_8;
  1471. if len<256 then
  1472. countregsize:=OS_8
  1473. else if len<65536 then
  1474. countregsize:=OS_16
  1475. else
  1476. internalerror(2011022007);
  1477. countreg:=getintregister(list,countregsize);
  1478. a_load_const_reg(list,countregsize,len,countreg);
  1479. a_loadaddr_ref_reg(list,source,NR_R30);
  1480. tmpreg:=getaddressregister(list);
  1481. a_loadaddr_ref_reg(list,dest,tmpreg);
  1482. { X is used for spilling code so we can load it
  1483. only by a push/pop sequence, this can be
  1484. optimized later on by the peephole optimizer
  1485. }
  1486. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1487. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1488. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1489. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1490. cg.a_label(list,l);
  1491. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1492. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1493. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1494. a_jmp_flags(list,F_NE,l);
  1495. // keep registers alive
  1496. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  1497. end
  1498. else
  1499. begin
  1500. SrcQuickRef:=false;
  1501. DestQuickRef:=false;
  1502. if not((source.addressmode=AM_UNCHANGED) and
  1503. (source.symbol=nil) and
  1504. ((source.base=NR_R28) or
  1505. (source.base=NR_R29)) and
  1506. (source.Index=NR_NO) and
  1507. (source.Offset in [0..64-len])) and
  1508. not((source.Base=NR_NO) and (source.Index=NR_NO)) then
  1509. srcref:=normalize_ref(list,source,NR_R30)
  1510. else
  1511. begin
  1512. SrcQuickRef:=true;
  1513. srcref:=source;
  1514. end;
  1515. if not((dest.addressmode=AM_UNCHANGED) and
  1516. (dest.symbol=nil) and
  1517. ((dest.base=NR_R28) or
  1518. (dest.base=NR_R29)) and
  1519. (dest.Index=NR_No) and
  1520. (dest.Offset in [0..64-len])) and
  1521. not((dest.Base=NR_NO) and (dest.Index=NR_NO)) then
  1522. begin
  1523. if not(SrcQuickRef) then
  1524. begin
  1525. tmpreg:=getaddressregister(list);
  1526. dstref:=normalize_ref(list,dest,tmpreg);
  1527. { X is used for spilling code so we can load it
  1528. only by a push/pop sequence, this can be
  1529. optimized later on by the peephole optimizer
  1530. }
  1531. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1532. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1533. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1534. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1535. dstref.base:=NR_R26;
  1536. end
  1537. else
  1538. dstref:=normalize_ref(list,dest,NR_R30);
  1539. end
  1540. else
  1541. begin
  1542. DestQuickRef:=true;
  1543. dstref:=dest;
  1544. end;
  1545. for i:=1 to len do
  1546. begin
  1547. if not(SrcQuickRef) and (i<len) then
  1548. srcref.addressmode:=AM_POSTINCREMENT
  1549. else
  1550. srcref.addressmode:=AM_UNCHANGED;
  1551. if not(DestQuickRef) and (i<len) then
  1552. dstref.addressmode:=AM_POSTINCREMENT
  1553. else
  1554. dstref.addressmode:=AM_UNCHANGED;
  1555. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1556. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1557. if SrcQuickRef then
  1558. inc(srcref.offset);
  1559. if DestQuickRef then
  1560. inc(dstref.offset);
  1561. end;
  1562. if not(SrcQuickRef) then
  1563. begin
  1564. ungetcpuregister(list,srcref.base);
  1565. ungetcpuregister(list,GetNextReg(srcref.base));
  1566. end;
  1567. end;
  1568. end;
  1569. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1570. var
  1571. hl : tasmlabel;
  1572. ai : taicpu;
  1573. cond : TAsmCond;
  1574. begin
  1575. if not(cs_check_overflow in current_settings.localswitches) then
  1576. exit;
  1577. current_asmdata.getjumplabel(hl);
  1578. if not ((def.typ=pointerdef) or
  1579. ((def.typ=orddef) and
  1580. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,
  1581. pasbool8,pasbool16,pasbool32,pasbool64]))) then
  1582. cond:=C_VC
  1583. else
  1584. cond:=C_CC;
  1585. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1586. ai.SetCondition(cond);
  1587. ai.is_jmp:=true;
  1588. list.concat(ai);
  1589. a_call_name(list,'FPC_OVERFLOW',false);
  1590. a_label(list,hl);
  1591. end;
  1592. procedure tcgavr.g_save_registers(list: TAsmList);
  1593. begin
  1594. { this is done by the entry code }
  1595. end;
  1596. procedure tcgavr.g_restore_registers(list: TAsmList);
  1597. begin
  1598. { this is done by the exit code }
  1599. end;
  1600. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1601. var
  1602. ai1,ai2 : taicpu;
  1603. hl : TAsmLabel;
  1604. begin
  1605. ai1:=Taicpu.Op_sym(A_BRxx,l);
  1606. ai1.is_jmp:=true;
  1607. hl:=nil;
  1608. case cond of
  1609. OC_EQ:
  1610. ai1.SetCondition(C_EQ);
  1611. OC_GT:
  1612. begin
  1613. { emulate GT }
  1614. current_asmdata.getjumplabel(hl);
  1615. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1616. ai2.SetCondition(C_EQ);
  1617. ai2.is_jmp:=true;
  1618. list.concat(ai2);
  1619. ai1.SetCondition(C_GE);
  1620. end;
  1621. OC_LT:
  1622. ai1.SetCondition(C_LT);
  1623. OC_GTE:
  1624. ai1.SetCondition(C_GE);
  1625. OC_LTE:
  1626. begin
  1627. { emulate LTE }
  1628. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1629. ai2.SetCondition(C_EQ);
  1630. ai2.is_jmp:=true;
  1631. list.concat(ai2);
  1632. ai1.SetCondition(C_LT);
  1633. end;
  1634. OC_NE:
  1635. ai1.SetCondition(C_NE);
  1636. OC_BE:
  1637. begin
  1638. { emulate BE }
  1639. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1640. ai2.SetCondition(C_EQ);
  1641. ai2.is_jmp:=true;
  1642. list.concat(ai2);
  1643. ai1.SetCondition(C_LO);
  1644. end;
  1645. OC_B:
  1646. ai1.SetCondition(C_LO);
  1647. OC_AE:
  1648. ai1.SetCondition(C_SH);
  1649. OC_A:
  1650. begin
  1651. { emulate A (unsigned GT) }
  1652. current_asmdata.getjumplabel(hl);
  1653. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1654. ai2.SetCondition(C_EQ);
  1655. ai2.is_jmp:=true;
  1656. list.concat(ai2);
  1657. ai1.SetCondition(C_SH);
  1658. end;
  1659. else
  1660. internalerror(2011082501);
  1661. end;
  1662. list.concat(ai1);
  1663. if assigned(hl) then
  1664. a_label(list,hl);
  1665. end;
  1666. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1667. var
  1668. instr: taicpu;
  1669. begin
  1670. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1671. list.Concat(instr);
  1672. { Notify the register allocator that we have written a move instruction so
  1673. it can try to eliminate it. }
  1674. add_move_instruction(instr);
  1675. end;
  1676. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1677. begin
  1678. if not(size in [OS_S64,OS_64]) then
  1679. internalerror(2012102402);
  1680. tcgavr(cg).a_op_reg_reg_internal(list,Op,size,regsrc.reglo,regsrc.reghi,regdst.reglo,regdst.reghi);
  1681. end;
  1682. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1683. begin
  1684. tcgavr(cg).a_op_const_reg_internal(list,Op,size,value,reg.reglo,reg.reghi);
  1685. end;
  1686. procedure create_codegen;
  1687. begin
  1688. cg:=tcgavr.create;
  1689. cg64:=tcg64favr.create;
  1690. end;
  1691. end.