hlcgcpu.pas 27 KB

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  1. {
  2. Copyright (c) 1998-2010 by Florian Klaempfl and Jonas Maebe
  3. Member of the Free Pascal development team
  4. This unit contains routines to create a pass-through high-level code
  5. generator. This is used by most regular code generators.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit hlcgcpu;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globals,globtype,
  24. aasmdata,
  25. symtype,symdef,parabase,
  26. cgbase,cgutils,
  27. hlcgobj, hlcgx86;
  28. type
  29. { thlcgcpu }
  30. thlcgcpu = class(thlcgx86)
  31. private
  32. { checks whether the type needs special methodptr-like handling, when stored
  33. in a LOC_REGISTER location. This applies to the following types:
  34. - i8086 method pointers (incl. 6-byte mixed near + far),
  35. - 6-byte records (only in the medium and compact memory model are these
  36. loaded in a register)
  37. - nested proc ptrs
  38. When stored in a LOC_REGISTER tlocation, these types use both register
  39. and registerhi with the following sizes:
  40. register - cgsize = int_cgsize(voidcodepointertype.size)
  41. registerhi - cgsize = int_cgsize(voidpointertype.size) or int_cgsize(parentfpvoidpointertype.size)
  42. (check d.size to determine which one of the two)
  43. }
  44. function is_methodptr_like_type(d:tdef): boolean;
  45. { 4-byte records in registers need special handling as well. A record may
  46. be located in registerhi:register if it was converted from a procvar or
  47. in GetNextReg(register):register if it was converted from a longint.
  48. We can tell between the two by checking whether registerhi has been set. }
  49. function is_fourbyterecord(d:tdef): boolean;
  50. protected
  51. procedure gen_loadfpu_loc_cgpara(list: TAsmList; size: tdef; const l: tlocation; const cgpara: tcgpara; locintsize: longint); override;
  52. public
  53. function getaddressregister(list:TAsmList;size:tdef):Tregister;override;
  54. procedure reference_reset_base(var ref: treference; regsize: tdef; reg: tregister; offset, alignment: longint); override;
  55. function a_call_name(list : TAsmList;pd : tprocdef;const s : TSymStr; const paras: array of pcgpara; forceresdef: tdef; weak: boolean): tcgpara;override;
  56. procedure a_load_loc_ref(list : TAsmList;fromsize, tosize: tdef; const loc: tlocation; const ref : treference);override;
  57. procedure a_loadaddr_ref_reg(list : TAsmList;fromsize, tosize : tdef;const ref : treference;r : tregister);override;
  58. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: tdef; a: tcgint; reg: TRegister); override;
  59. procedure g_copyvaluepara_openarray(list: TAsmList; const ref: treference; const lenloc: tlocation; arrdef: tarraydef; destreg: tregister); override;
  60. procedure g_releasevaluepara_openarray(list: TAsmList; arrdef: tarraydef; const l: tlocation); override;
  61. procedure g_exception_reason_save(list: TAsmList; fromsize, tosize: tdef; reg: tregister; const href: treference); override;
  62. procedure g_exception_reason_save_const(list: TAsmList; size: tdef; a: tcgint; const href: treference); override;
  63. procedure g_exception_reason_load(list: TAsmList; fromsize, tosize: tdef; const href: treference; reg: tregister); override;
  64. procedure g_exception_reason_discard(list: TAsmList; size: tdef; href: treference); override;
  65. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  66. procedure location_force_mem(list:TAsmList;var l:tlocation;size:tdef);override;
  67. end;
  68. procedure create_hlcodegen;
  69. implementation
  70. uses
  71. verbose,
  72. paramgr,
  73. aasmbase,aasmtai,
  74. cpubase,cpuinfo,tgobj,cgobj,cgx86,cgcpu,
  75. defutil,
  76. symconst,symcpu,
  77. procinfo,fmodule,
  78. aasmcpu;
  79. { thlcgcpu }
  80. function thlcgcpu.is_methodptr_like_type(d: tdef): boolean;
  81. var
  82. is_sixbyterecord,is_methodptr,is_nestedprocptr: Boolean;
  83. begin
  84. is_sixbyterecord:=(d.typ=recorddef) and (d.size=6);
  85. is_methodptr:=(d.typ=procvardef)
  86. and (po_methodpointer in tprocvardef(d).procoptions)
  87. and not(po_addressonly in tprocvardef(d).procoptions);
  88. is_nestedprocptr:=(d.typ=procvardef)
  89. and is_nested_pd(tprocvardef(d))
  90. and not(po_addressonly in tprocvardef(d).procoptions);
  91. result:=is_sixbyterecord or is_methodptr or is_nestedprocptr;
  92. end;
  93. function thlcgcpu.is_fourbyterecord(d: tdef): boolean;
  94. begin
  95. result:=(d.typ=recorddef) and (d.size=4);
  96. end;
  97. procedure thlcgcpu.gen_loadfpu_loc_cgpara(list: TAsmList; size: tdef; const l: tlocation; const cgpara: tcgpara; locintsize: longint);
  98. var
  99. locsize : tcgsize;
  100. tmploc : tlocation;
  101. href : treference;
  102. stacksize : longint;
  103. begin
  104. if not(l.size in [OS_32,OS_S32,OS_64,OS_S64,OS_128,OS_S128]) then
  105. locsize:=l.size
  106. else
  107. locsize:=int_float_cgsize(tcgsize2size[l.size]);
  108. case l.loc of
  109. LOC_FPUREGISTER,
  110. LOC_CFPUREGISTER:
  111. begin
  112. case cgpara.location^.loc of
  113. LOC_REFERENCE:
  114. begin
  115. stacksize:=align(locintsize,cgpara.alignment);
  116. if (not paramanager.use_fixed_stack) and
  117. (cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
  118. begin
  119. cg.g_stackpointer_alloc(list,stacksize);
  120. reference_reset_base(href,voidstackpointertype,NR_STACK_POINTER_REG,0,voidstackpointertype.size);
  121. end
  122. else
  123. reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  124. cg.a_loadfpu_reg_ref(list,locsize,locsize,l.register,href);
  125. end;
  126. LOC_FPUREGISTER:
  127. begin
  128. cg.a_loadfpu_reg_reg(list,locsize,cgpara.location^.size,l.register,cgpara.location^.register);
  129. end;
  130. { can happen if a record with only 1 "single field" is
  131. returned in a floating point register and then is directly
  132. passed to a regcall parameter }
  133. LOC_REGISTER:
  134. begin
  135. tmploc:=l;
  136. location_force_mem(list,tmploc,size);
  137. case locsize of
  138. OS_F32:
  139. tmploc.size:=OS_32;
  140. OS_F64:
  141. tmploc.size:=OS_64;
  142. else
  143. internalerror(2010053116);
  144. end;
  145. cg.a_load_loc_cgpara(list,tmploc,cgpara);
  146. location_freetemp(list,tmploc);
  147. end
  148. else
  149. internalerror(2010053003);
  150. end;
  151. end;
  152. LOC_MMREGISTER,
  153. LOC_CMMREGISTER:
  154. begin
  155. case cgpara.location^.loc of
  156. LOC_REFERENCE:
  157. begin
  158. { can't use TCGSize2Size[l.size], because the size of an
  159. 80 bit extended parameter can be either 10 or 12 bytes }
  160. stacksize:=align(locintsize,cgpara.alignment);
  161. if (not paramanager.use_fixed_stack) and
  162. (cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
  163. begin
  164. cg.g_stackpointer_alloc(list,stacksize);
  165. reference_reset_base(href,voidstackpointertype,NR_STACK_POINTER_REG,0,voidstackpointertype.size);
  166. end
  167. else
  168. reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  169. cg.a_loadmm_reg_ref(list,locsize,locsize,l.register,href,mms_movescalar);
  170. end;
  171. LOC_FPUREGISTER:
  172. begin
  173. tmploc:=l;
  174. location_force_mem(list,tmploc,size);
  175. cg.a_loadfpu_ref_cgpara(list,tmploc.size,tmploc.reference,cgpara);
  176. location_freetemp(list,tmploc);
  177. end;
  178. else
  179. internalerror(2010053004);
  180. end;
  181. end;
  182. LOC_REFERENCE,
  183. LOC_CREFERENCE :
  184. begin
  185. case cgpara.location^.loc of
  186. LOC_REFERENCE:
  187. begin
  188. stacksize:=align(locintsize,cgpara.alignment);
  189. if (not paramanager.use_fixed_stack) and
  190. (cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
  191. cg.a_load_ref_cgpara(list,locsize,l.reference,cgpara)
  192. else
  193. begin
  194. reference_reset_base(href,voidstackpointertype,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  195. cg.g_concatcopy(list,l.reference,href,stacksize);
  196. end;
  197. end;
  198. LOC_FPUREGISTER:
  199. begin
  200. cg.a_loadfpu_ref_cgpara(list,locsize,l.reference,cgpara);
  201. end;
  202. else
  203. internalerror(2010053005);
  204. end;
  205. end;
  206. else
  207. internalerror(2002042430);
  208. end;
  209. end;
  210. function thlcgcpu.getaddressregister(list: TAsmList; size: tdef): Tregister;
  211. begin
  212. { implicit pointer types on i8086 follow the default data pointer size for
  213. the current memory model }
  214. if is_implicit_pointer_object_type(size) or is_implicit_array_pointer(size) then
  215. size:=voidpointertype;
  216. { procvars follow the default code pointer size for the current memory model }
  217. if size.typ=procvardef then
  218. if ((po_methodpointer in tprocvardef(size).procoptions) or
  219. is_nested_pd(tprocvardef(size))) and
  220. not(po_addressonly in tprocvardef(size).procoptions) then
  221. internalerror(2015120101)
  222. else
  223. size:=voidcodepointertype;
  224. if is_farpointer(size) or is_hugepointer(size) then
  225. Result:=cg.getintregister(list,OS_32)
  226. else
  227. Result:=cg.getintregister(list,OS_16);
  228. end;
  229. procedure thlcgcpu.reference_reset_base(var ref: treference; regsize: tdef;
  230. reg: tregister; offset, alignment: longint);
  231. begin
  232. inherited reference_reset_base(ref, regsize, reg, offset, alignment);
  233. { implicit pointer types on i8086 follow the default data pointer size for
  234. the current memory model }
  235. if is_implicit_pointer_object_type(regsize) or is_implicit_array_pointer(regsize) then
  236. regsize:=voidpointertype;
  237. if regsize.typ=pointerdef then
  238. case tcpupointerdef(regsize).x86pointertyp of
  239. x86pt_near:
  240. ;
  241. x86pt_near_cs:
  242. ref.segment:=NR_CS;
  243. x86pt_near_ds:
  244. ref.segment:=NR_DS;
  245. x86pt_near_ss:
  246. ref.segment:=NR_SS;
  247. x86pt_near_es:
  248. ref.segment:=NR_ES;
  249. x86pt_near_fs:
  250. ref.segment:=NR_FS;
  251. x86pt_near_gs:
  252. ref.segment:=NR_GS;
  253. x86pt_far,
  254. x86pt_huge:
  255. if reg<>NR_NO then
  256. ref.segment:=GetNextReg(reg);
  257. end;
  258. end;
  259. function thlcgcpu.a_call_name(list : TAsmList;pd : tprocdef;const s : TSymStr; const paras: array of pcgpara; forceresdef: tdef; weak: boolean): tcgpara;
  260. begin
  261. if is_proc_far(pd) then
  262. begin
  263. { far calls to the same module (in $HUGECODE off mode) can be optimized
  264. to push cs + call near, because they are in the same segment }
  265. if not (cs_huge_code in current_settings.moduleswitches) and
  266. pd.owner.iscurrentunit and not (po_external in pd.procoptions) then
  267. begin
  268. list.concat(Taicpu.Op_reg(A_PUSH,S_W,NR_CS));
  269. tcg8086(cg).a_call_name_near(list,s,weak);
  270. end
  271. else
  272. tcg8086(cg).a_call_name_far(list,s,weak);
  273. end
  274. else
  275. tcg8086(cg).a_call_name_near(list,s,weak);
  276. result:=get_call_result_cgpara(pd,forceresdef);
  277. end;
  278. procedure thlcgcpu.a_load_loc_ref(list: TAsmList; fromsize, tosize: tdef; const loc: tlocation; const ref: treference);
  279. var
  280. tmpref: treference;
  281. begin
  282. if is_methodptr_like_type(tosize) and (loc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  283. begin
  284. tmpref:=ref;
  285. a_load_reg_ref(list,voidcodepointertype,voidcodepointertype,loc.register,tmpref);
  286. inc(tmpref.offset,voidcodepointertype.size);
  287. { the second part could be either self or parentfp }
  288. if tosize.size=(voidcodepointertype.size+voidpointertype.size) then
  289. a_load_reg_ref(list,voidpointertype,voidpointertype,loc.registerhi,tmpref)
  290. else if tosize.size=(voidcodepointertype.size+parentfpvoidpointertype.size) then
  291. a_load_reg_ref(list,parentfpvoidpointertype,parentfpvoidpointertype,loc.registerhi,tmpref)
  292. else
  293. internalerror(2014052201);
  294. end
  295. else if is_fourbyterecord(tosize) and (loc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  296. begin
  297. tmpref:=ref;
  298. cg.a_load_reg_ref(list,OS_16,OS_16,loc.register,tmpref);
  299. inc(tmpref.offset,2);
  300. if loc.registerhi<>tregister(0) then
  301. cg.a_load_reg_ref(list,OS_16,OS_16,loc.registerhi,tmpref)
  302. else
  303. cg.a_load_reg_ref(list,OS_16,OS_16,GetNextReg(loc.register),tmpref);
  304. end
  305. else
  306. inherited a_load_loc_ref(list, fromsize, tosize, loc, ref);
  307. end;
  308. procedure thlcgcpu.a_loadaddr_ref_reg(list: TAsmList; fromsize, tosize: tdef; const ref: treference; r: tregister);
  309. var
  310. tmpref,segref: treference;
  311. begin
  312. { step 1: call the x86 low level code generator to handle the offset;
  313. we set the segment to NR_NO to disable the i8086 segment handling code
  314. in the low level cg (which can be removed, once all calls to
  315. a_loadaddr_ref_reg go through the high level code generator) }
  316. tmpref:=ref;
  317. tmpref.segment:=NR_NO;
  318. cg.a_loadaddr_ref_reg(list, tmpref, r);
  319. { step 2: if destination is a far pointer, we have to pass a segment as well }
  320. if is_farpointer(tosize) or is_hugepointer(tosize) or is_farprocvar(tosize) or
  321. ((tosize.typ=classrefdef) and (tosize.size=4)) then
  322. begin
  323. { if a segment register is specified in ref, we use that }
  324. if ref.segment<>NR_NO then
  325. begin
  326. if is_segment_reg(ref.segment) then
  327. list.concat(Taicpu.op_reg_reg(A_MOV,S_W,ref.segment,GetNextReg(r)))
  328. else
  329. cg.a_load_reg_reg(list,OS_16,OS_16,ref.segment,GetNextReg(r));
  330. end
  331. { references relative to a symbol use the segment of the symbol,
  332. which can be obtained by the SEG directive }
  333. else if assigned(ref.symbol) then
  334. begin
  335. reference_reset_symbol(segref,ref.symbol,0,0);
  336. segref.refaddr:=addr_seg;
  337. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_16,OS_16,segref,GetNextReg(r));
  338. end
  339. else if ref.base=NR_BP then
  340. list.concat(Taicpu.op_reg_reg(A_MOV,S_W,NR_SS,GetNextReg(r)))
  341. else
  342. internalerror(2014032801);
  343. end;
  344. end;
  345. procedure thlcgcpu.a_op_const_reg(list: TAsmList; Op: TOpCG; size: tdef; a: tcgint; reg: TRegister);
  346. begin
  347. { implicit pointer types on i8086 follow the default data pointer size for
  348. the current memory model }
  349. if is_implicit_pointer_object_type(size) or is_implicit_array_pointer(size) then
  350. size:=voidpointertype;
  351. if is_hugepointer(size) then
  352. internalerror(2015111201)
  353. else if is_farpointer(size) then
  354. cg.a_op_const_reg(list,Op,OS_16,a,reg)
  355. else
  356. inherited a_op_const_reg(list,Op,size,a,reg);
  357. end;
  358. procedure thlcgcpu.g_copyvaluepara_openarray(list: TAsmList; const ref: treference; const lenloc: tlocation; arrdef: tarraydef; destreg: tregister);
  359. begin
  360. if paramanager.use_fixed_stack then
  361. begin
  362. inherited;
  363. exit;
  364. end;
  365. tcg8086(cg).g_copyvaluepara_openarray(list,ref,lenloc,arrdef.elesize,destreg);
  366. end;
  367. procedure thlcgcpu.g_releasevaluepara_openarray(list: TAsmList; arrdef: tarraydef; const l: tlocation);
  368. begin
  369. if paramanager.use_fixed_stack then
  370. begin
  371. inherited;
  372. exit;
  373. end;
  374. tcg8086(cg).g_releasevaluepara_openarray(list,l);
  375. end;
  376. procedure thlcgcpu.g_exception_reason_save(list: TAsmList; fromsize, tosize: tdef; reg: tregister; const href: treference);
  377. begin
  378. if not paramanager.use_fixed_stack then
  379. list.concat(Taicpu.op_reg(A_PUSH,tcgsize2opsize[def_cgsize(tosize)],reg))
  380. else
  381. inherited
  382. end;
  383. procedure thlcgcpu.g_exception_reason_save_const(list: TAsmList; size: tdef; a: tcgint; const href: treference);
  384. begin
  385. if not paramanager.use_fixed_stack then
  386. tcg8086(cg).push_const(list,def_cgsize(size),a)
  387. else
  388. inherited;
  389. end;
  390. procedure thlcgcpu.g_exception_reason_load(list: TAsmList; fromsize, tosize: tdef; const href: treference; reg: tregister);
  391. begin
  392. if not paramanager.use_fixed_stack then
  393. list.concat(Taicpu.op_reg(A_POP,tcgsize2opsize[def_cgsize(tosize)],reg))
  394. else
  395. inherited;
  396. end;
  397. procedure thlcgcpu.g_exception_reason_discard(list: TAsmList; size: tdef; href: treference);
  398. begin
  399. if not paramanager.use_fixed_stack then
  400. begin
  401. getcpuregister(list,NR_FUNCTION_RESULT_REG);
  402. list.concat(Taicpu.op_reg(A_POP,tcgsize2opsize[def_cgsize(size)],NR_FUNCTION_RESULT_REG));
  403. ungetcpuregister(list,NR_FUNCTION_RESULT_REG);
  404. end;
  405. end;
  406. procedure thlcgcpu.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  407. {
  408. possible calling conventions:
  409. default stdcall cdecl pascal register
  410. default(0): OK OK OK OK OK
  411. virtual(1): OK OK OK OK OK(2)
  412. (0):
  413. set self parameter to correct value
  414. jmp mangledname
  415. (1): The wrapper code use %eax to reach the virtual method address
  416. set self to correct value
  417. move self,%bx
  418. mov 0(%bx),%bx ; load vmt
  419. jmp vmtoffs(%bx) ; method offs
  420. (2): Virtual use values pushed on stack to reach the method address
  421. so the following code be generated:
  422. set self to correct value
  423. push %bx ; allocate space for function address
  424. push %bx
  425. push %di
  426. mov self,%bx
  427. mov 0(%bx),%bx ; load vmt
  428. mov vmtoffs(%bx),bx ; method offs
  429. mov %sp,%di
  430. mov %bx,4(%di)
  431. pop %di
  432. pop %bx
  433. ret 0; jmp the address
  434. }
  435. procedure getselftobx(offs: longint);
  436. var
  437. href : treference;
  438. selfoffsetfromsp : longint;
  439. begin
  440. { "mov offset(%sp),%bx" }
  441. if (procdef.proccalloption<>pocall_register) then
  442. begin
  443. list.concat(taicpu.op_reg(A_PUSH,S_W,NR_DI));
  444. { framepointer is pushed for nested procs }
  445. if procdef.parast.symtablelevel>normal_function_level then
  446. selfoffsetfromsp:=2*sizeof(aint)
  447. else
  448. selfoffsetfromsp:=sizeof(aint);
  449. if current_settings.x86memorymodel in x86_far_code_models then
  450. inc(selfoffsetfromsp,2);
  451. list.concat(taicpu.op_reg_reg(A_mov,S_W,NR_SP,NR_DI));
  452. reference_reset_base(href,voidnearpointertype,NR_DI,selfoffsetfromsp+offs+2,2);
  453. if not segment_regs_equal(NR_SS,NR_DS) then
  454. href.segment:=NR_SS;
  455. if current_settings.x86memorymodel in x86_near_data_models then
  456. cg.a_load_ref_reg(list,OS_16,OS_16,href,NR_BX)
  457. else
  458. list.concat(taicpu.op_ref_reg(A_LES,S_W,href,NR_BX));
  459. list.concat(taicpu.op_reg(A_POP,S_W,NR_DI));
  460. end
  461. else
  462. cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_BX,NR_BX);
  463. end;
  464. procedure loadvmttobx;
  465. var
  466. href : treference;
  467. begin
  468. { mov 0(%bx),%bx ; load vmt}
  469. if current_settings.x86memorymodel in x86_near_data_models then
  470. begin
  471. reference_reset_base(href,voidnearpointertype,NR_BX,0,2);
  472. cg.a_load_ref_reg(list,OS_16,OS_16,href,NR_BX);
  473. end
  474. else
  475. begin
  476. reference_reset_base(href,voidnearpointertype,NR_BX,0,2);
  477. href.segment:=NR_ES;
  478. list.concat(taicpu.op_ref_reg(A_LES,S_W,href,NR_BX));
  479. end;
  480. end;
  481. procedure loadmethodoffstobx;
  482. var
  483. href : treference;
  484. srcseg: TRegister;
  485. begin
  486. if (procdef.extnumber=$ffff) then
  487. Internalerror(200006139);
  488. if current_settings.x86memorymodel in x86_far_data_models then
  489. srcseg:=NR_ES
  490. else
  491. srcseg:=NR_NO;
  492. if current_settings.x86memorymodel in x86_far_code_models then
  493. begin
  494. { mov vmtseg(%bx),%si ; method seg }
  495. reference_reset_base(href,voidnearpointertype,NR_BX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber)+2,2);
  496. href.segment:=srcseg;
  497. cg.a_load_ref_reg(list,OS_16,OS_16,href,NR_SI);
  498. end;
  499. { mov vmtoffs(%bx),%bx ; method offs }
  500. reference_reset_base(href,voidnearpointertype,NR_BX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),2);
  501. href.segment:=srcseg;
  502. cg.a_load_ref_reg(list,OS_16,OS_16,href,NR_BX);
  503. end;
  504. var
  505. lab : tasmsymbol;
  506. make_global : boolean;
  507. href : treference;
  508. begin
  509. if not(procdef.proctypeoption in [potype_function,potype_procedure]) then
  510. Internalerror(200006137);
  511. if not assigned(procdef.struct) or
  512. (procdef.procoptions*[po_classmethod, po_staticmethod,
  513. po_methodpointer, po_interrupt, po_iocheck]<>[]) then
  514. Internalerror(200006138);
  515. if procdef.owner.symtabletype<>ObjectSymtable then
  516. Internalerror(200109191);
  517. make_global:=false;
  518. if (not current_module.is_unit) or
  519. create_smartlink or
  520. (procdef.owner.defowner.owner.symtabletype=globalsymtable) then
  521. make_global:=true;
  522. if make_global then
  523. List.concat(Tai_symbol.Createname_global(labelname,AT_FUNCTION,0))
  524. else
  525. List.concat(Tai_symbol.Createname(labelname,AT_FUNCTION,0));
  526. { set param1 interface to self }
  527. g_adjust_self_value(list,procdef,ioffset);
  528. if (po_virtualmethod in procdef.procoptions) and
  529. not is_objectpascal_helper(procdef.struct) then
  530. begin
  531. { case 1 & case 2 }
  532. list.concat(taicpu.op_reg(A_PUSH,S_W,NR_BX)); { allocate space for address}
  533. if current_settings.x86memorymodel in x86_far_code_models then
  534. list.concat(taicpu.op_reg(A_PUSH,S_W,NR_BX));
  535. list.concat(taicpu.op_reg(A_PUSH,S_W,NR_BX));
  536. list.concat(taicpu.op_reg(A_PUSH,S_W,NR_DI));
  537. if current_settings.x86memorymodel in x86_far_code_models then
  538. list.concat(taicpu.op_reg(A_PUSH,S_W,NR_SI));
  539. if current_settings.x86memorymodel in x86_far_code_models then
  540. getselftobx(10)
  541. else
  542. getselftobx(6);
  543. loadvmttobx;
  544. loadmethodoffstobx;
  545. { set target address
  546. "mov %bx,4(%sp)" }
  547. if current_settings.x86memorymodel in x86_far_code_models then
  548. reference_reset_base(href,voidnearpointertype,NR_DI,6,2)
  549. else
  550. reference_reset_base(href,voidnearpointertype,NR_DI,4,2);
  551. if not segment_regs_equal(NR_DS,NR_SS) then
  552. href.segment:=NR_SS;
  553. list.concat(taicpu.op_reg_reg(A_MOV,S_W,NR_SP,NR_DI));
  554. list.concat(taicpu.op_reg_ref(A_MOV,S_W,NR_BX,href));
  555. if current_settings.x86memorymodel in x86_far_code_models then
  556. begin
  557. inc(href.offset,2);
  558. list.concat(taicpu.op_reg_ref(A_MOV,S_W,NR_SI,href));
  559. end;
  560. { load ax? }
  561. if procdef.proccalloption=pocall_register then
  562. list.concat(taicpu.op_reg_reg(A_MOV,S_W,NR_BX,NR_AX));
  563. { restore register
  564. pop %di,bx }
  565. if current_settings.x86memorymodel in x86_far_code_models then
  566. list.concat(taicpu.op_reg(A_POP,S_W,NR_SI));
  567. list.concat(taicpu.op_reg(A_POP,S_W,NR_DI));
  568. list.concat(taicpu.op_reg(A_POP,S_W,NR_BX));
  569. { ret ; jump to the address }
  570. if current_settings.x86memorymodel in x86_far_code_models then
  571. list.concat(taicpu.op_none(A_RETF,S_W))
  572. else
  573. list.concat(taicpu.op_none(A_RET,S_W));
  574. end
  575. { case 0 }
  576. else
  577. begin
  578. lab:=current_asmdata.RefAsmSymbol(procdef.mangledname);
  579. if current_settings.x86memorymodel in x86_far_code_models then
  580. list.concat(taicpu.op_sym(A_JMP,S_FAR,lab))
  581. else
  582. list.concat(taicpu.op_sym(A_JMP,S_NO,lab));
  583. end;
  584. List.concat(Tai_symbol_end.Createname(labelname));
  585. end;
  586. procedure thlcgcpu.location_force_mem(list: TAsmList; var l: tlocation; size: tdef);
  587. var
  588. r,tmpref: treference;
  589. begin
  590. if is_methodptr_like_type(size) and (l.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  591. begin
  592. tg.gethltemp(list,size,size.size,tt_normal,r);
  593. tmpref:=r;
  594. a_load_reg_ref(list,voidcodepointertype,voidcodepointertype,l.register,tmpref);
  595. inc(tmpref.offset,voidcodepointertype.size);
  596. { the second part could be either self or parentfp }
  597. if size.size=(voidcodepointertype.size+voidpointertype.size) then
  598. a_load_reg_ref(list,voidpointertype,voidpointertype,l.registerhi,tmpref)
  599. else if size.size=(voidcodepointertype.size+parentfpvoidpointertype.size) then
  600. a_load_reg_ref(list,parentfpvoidpointertype,parentfpvoidpointertype,l.registerhi,tmpref)
  601. else
  602. internalerror(2014052202);
  603. location_reset_ref(l,LOC_REFERENCE,l.size,0);
  604. l.reference:=r;
  605. end
  606. else if is_fourbyterecord(size) and (l.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  607. begin
  608. tg.gethltemp(list,size,size.size,tt_normal,r);
  609. tmpref:=r;
  610. cg.a_load_reg_ref(list,OS_16,OS_16,l.register,tmpref);
  611. inc(tmpref.offset,2);
  612. if l.registerhi<>tregister(0) then
  613. cg.a_load_reg_ref(list,OS_16,OS_16,l.registerhi,tmpref)
  614. else
  615. cg.a_load_reg_ref(list,OS_16,OS_16,GetNextReg(l.register),tmpref);
  616. location_reset_ref(l,LOC_REFERENCE,l.size,0);
  617. l.reference:=r;
  618. end
  619. else
  620. inherited;
  621. end;
  622. procedure create_hlcodegen;
  623. begin
  624. hlcg:=thlcgcpu.create;
  625. create_codegen;
  626. end;
  627. begin
  628. chlcgobj:=thlcgcpu;
  629. end.