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a64att.inc
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88ab9576b1
* a64: Added "ABS" and "CTZ" mnemonics (CSSC instructions)
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hai 1 ano |
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a64atts.inc
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88ab9576b1
* a64: Added "ABS" and "CTZ" mnemonics (CSSC instructions)
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hai 1 ano |
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a64ins.dat
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88ab9576b1
* a64: Added "ABS" and "CTZ" mnemonics (CSSC instructions)
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hai 1 ano |
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a64nop.inc
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0197b84b7f
+ instruction table generator for arm64
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%!s(int64=13) %!d(string=hai) anos |
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a64op.inc
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88ab9576b1
* a64: Added "ABS" and "CTZ" mnemonics (CSSC instructions)
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hai 1 ano |
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a64reg.dat
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7cefe8a822
Adding AArch64 CurrentEL register
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%!s(int64=3) %!d(string=hai) anos |
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a64tab.inc
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585e4a9a14
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
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%!s(int64=10) %!d(string=hai) anos |
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aasmcpu.pas
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48fe8e6208
* unify internalerror
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hai 5 meses |
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agcpugas.pas
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373ebbcf41
Enable -Aas-clang for unix and embedded targets for aarch64 compiler
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hai 7 meses |
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aoptcpu.pas
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1802a8c493
+ apply OptPass1Data to variable shifting/rotating operations as well
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hai 8 meses |
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aoptcpub.pas
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281b3ad276
* fix case completeness and unreachable code warnings in compiler that would
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%!s(int64=6) %!d(string=hai) anos |
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aoptcpud.pas
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e1af3ecc5d
+ assembler optimizer unit skeleton
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%!s(int64=13) %!d(string=hai) anos |
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cgcpu.pas
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d71f823373
* cleanup
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hai 8 meses |
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cpubase.pas
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ef1cb852a8
* a64: New CSEL block optimisations ported over from x86 CMOV block optimisations
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hai 1 ano |
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cpuinfo.pas
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1ba93085f7
* a64: Added DOTPROD and PAUTH support flags to relevant instruction sets (v8.4+ and v8.3+ respectively)
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hai 1 ano |
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cpunode.pas
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bf970b29f4
* arm / a64: TAsmNode debugging info is now output for ARM and AArch64
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hai 1 ano |
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cpupara.pas
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0430e1bd1a
* pass all const record parameters on aarch64-win64 as references due to the habit of passing records as pointers by using the const modifier in the Windows unit
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hai 11 meses |
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cpupi.pas
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2b59000d56
+ implement compiler support for SEH on Win64
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%!s(int64=5) %!d(string=hai) anos |
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cputarg.pas
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53e5a4a03a
Adding aaarch64-embedded target
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%!s(int64=3) %!d(string=hai) anos |
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hlcgcpu.pas
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7c9fb4b4af
* AArch64: fix storing a 32 bit value in the lower 32 bits of a 64 bit
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%!s(int64=4) %!d(string=hai) anos |
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itcpugas.pas
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046184dfe9
+ ARM64 GAS instruction table unit
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%!s(int64=13) %!d(string=hai) anos |
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naarch64util.pas
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4e8b1cb97a
* Fixed signature of insert_init_final_table
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hai 1 ano |
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ncpuadd.pas
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2b7df4237b
* nf_pass1_done, nf_error, nf_processing and nf_do_not_execute
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hai 1 ano |
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ncpucnv.pas
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4357caaad8
* Removed unused local vars.
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%!s(int64=7) %!d(string=hai) anos |
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ncpucon.pas
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a019536cd5
* avoid that -0.0 is handled by the eor optimization
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%!s(int64=6) %!d(string=hai) anos |
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ncpuflw.pas
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637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
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%!s(int64=5) %!d(string=hai) anos |
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ncpuinl.pas
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77c86cafd0
* a64: Fixed bug where unsigned min/max inlines used a signed comparison
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hai 1 ano |
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ncpumat.pas
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09be204011
+ extend node_not_zero to take range types into account
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hai 8 meses |
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ncpumem.pas
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4686f61002
* keep track of the temp position separately from the offset in references,
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%!s(int64=7) %!d(string=hai) anos |
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ncpuset.pas
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cba0ca490e
* genlinearlist and genlinearcmplist for case blocks now allocate the flags properly
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hai 6 meses |
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ra64con.inc
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7cefe8a822
Adding AArch64 CurrentEL register
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%!s(int64=3) %!d(string=hai) anos |
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ra64dwa.inc
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7cefe8a822
Adding AArch64 CurrentEL register
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%!s(int64=3) %!d(string=hai) anos |
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ra64nor.inc
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7cefe8a822
Adding AArch64 CurrentEL register
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%!s(int64=3) %!d(string=hai) anos |
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ra64num.inc
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7cefe8a822
Adding AArch64 CurrentEL register
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%!s(int64=3) %!d(string=hai) anos |
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ra64rni.inc
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7cefe8a822
Adding AArch64 CurrentEL register
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%!s(int64=3) %!d(string=hai) anos |
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ra64sri.inc
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7cefe8a822
Adding AArch64 CurrentEL register
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%!s(int64=3) %!d(string=hai) anos |
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ra64sta.inc
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7cefe8a822
Adding AArch64 CurrentEL register
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%!s(int64=3) %!d(string=hai) anos |
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ra64std.inc
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7cefe8a822
Adding AArch64 CurrentEL register
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%!s(int64=3) %!d(string=hai) anos |
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ra64sup.inc
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7cefe8a822
Adding AArch64 CurrentEL register
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%!s(int64=3) %!d(string=hai) anos |
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racpu.pas
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9376f5a43a
* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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%!s(int64=5) %!d(string=hai) anos |
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racpugas.pas
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9813eb9048
AArch64 asm reader: add support for fpcmp(e) conditions
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%!s(int64=3) %!d(string=hai) anos |
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rgcpu.pas
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bb977b398d
* AArch64: fix spilling integer registers to stack offsets that cannot be
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%!s(int64=4) %!d(string=hai) anos |
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symcpu.pas
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7dd1d6aa77
o fixes handling of iso i/o parameters/program parameters:
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%!s(int64=10) %!d(string=hai) anos |
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tripletcpu.pas
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eb7ba1690e
* mark all external assemblers using an LLVM tool using af_llvm
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%!s(int64=5) %!d(string=hai) anos |
florian
48fe8e6208
* unify internalerror