Jonas Maebe 61af0fb72d * only take into account the location of the parameter at the callee side to 8 lat temu
..
aasmcpu.pas 1cb8c0d00c * specify the def of assembler level symbols defined via 9 lat temu
agarmgas.pas 74a49b5f91 * restructured the the TExternalAssembler constructors so that the 8 lat temu
aoptcpu.pas 4868b83157 * do not generate always debug messages in the arm assembler optimizer 8 lat temu
aoptcpub.pas d37e72dbf9 * ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions. 11 lat temu
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 lat temu
armatt.inc 9d1646e2a8 Add support for writeback in RFE and SRS instructions. 9 lat temu
armatts.inc 9d1646e2a8 Add support for writeback in RFE and SRS instructions. 9 lat temu
armins.dat c564acd378 * fix assembling of vfnm* 9 lat temu
armnop.inc 439027a8de Add most pre-UAL VFP instruction forms. 10 lat temu
armop.inc 9d1646e2a8 Add support for writeback in RFE and SRS instructions. 9 lat temu
armreg.dat 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
armtab.inc c564acd378 * fix assembling of vfnm* 9 lat temu
cgcpu.pas 2ae3ce79bb * ARM: Never use the "BLX label" instruction. Use "BL label" instead. 8 lat temu
cpubase.pas 880d438704 * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can 8 lat temu
cpuelf.pas 86940dfb32 AROS: added arm-aros target to compiler and fpcmake 8 lat temu
cpuinfo.pas 73c46a5988 - removed unused constants 8 lat temu
cpunode.pas a0efde8167 * automatically generate necessary indirect symbols when a new assembler 9 lat temu
cpupara.pas 4c68ea1000 * use pocalls_cdecl and cstylearrayofconst more consistently instead of 8 lat temu
cpupi.pas 880d438704 * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can 8 lat temu
cputarg.pas 86940dfb32 AROS: added arm-aros target to compiler and fpcmake 8 lat temu
hlcgcpu.pas a25ebbba3e + added volatility information to all memory references 8 lat temu
itcpugas.pas 47d43750e4 * remove unused units from uses statements 12 lat temu
narmadd.pas e1546303f8 + enable use of vfma and friends on arm when doing fastmath optimizations 9 lat temu
narmcal.pas f5f895e2a3 syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed 8 lat temu
narmcnv.pas c961c72c30 * tarmtypeconvnode.first_int_to_real should call the generic method in the parent class, if soft fpu code is generated, resolves #31350 8 lat temu
narmcon.pas a25ebbba3e + added volatility information to all memory references 8 lat temu
narminl.pas a25ebbba3e + added volatility information to all memory references 8 lat temu
narmmat.pas efc5e339d0 * use an enum instead of integer constants to represent inline numbers 8 lat temu
narmmem.pas d6de2c03cb * generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe 10 lat temu
narmset.pas 95094e9a8f * Removed unused vars. 8 lat temu
pp.lpi.template 1f032375c3 * improved template with help from Mattias Gaertner 19 lat temu
raarm.pas 780e75bfac o patch by Jeppe Johansen to fix mantis #17472: 14 lat temu
raarmgas.pas 61af0fb72d * only take into account the location of the parameter at the callee side to 8 lat temu
rarmcon.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmdwa.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmnor.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmnum.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmrni.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmsri.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmsta.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmstd.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rarmsup.inc 387824c1ee Added some APSR register bitmask definitions. 10 lat temu
rgcpu.pas b41989adfa * offset of vstr/vld is limited to +/- 1020, take care of this during spilling 8 lat temu
symcpu.pas 657aa06360 arm: arm-aros syscall support 8 lat temu