| .. |
|
aasmcpu.pas
|
1cb8c0d00c
* specify the def of assembler level symbols defined via
|
9 lat temu |
|
agarmgas.pas
|
86940dfb32
AROS: added arm-aros target to compiler and fpcmake
|
8 lat temu |
|
aoptcpu.pas
|
38fd0efa3b
* don't conditionalise BL on ARM, because it may have to be converted to
|
9 lat temu |
|
aoptcpub.pas
|
d37e72dbf9
* ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions.
|
11 lat temu |
|
aoptcpuc.pas
|
790a4fe2d3
* log and id tags removed
|
20 lat temu |
|
aoptcpud.pas
|
790a4fe2d3
* log and id tags removed
|
20 lat temu |
|
armatt.inc
|
9d1646e2a8
Add support for writeback in RFE and SRS instructions.
|
9 lat temu |
|
armatts.inc
|
9d1646e2a8
Add support for writeback in RFE and SRS instructions.
|
9 lat temu |
|
armins.dat
|
c564acd378
* fix assembling of vfnm*
|
9 lat temu |
|
armnop.inc
|
439027a8de
Add most pre-UAL VFP instruction forms.
|
10 lat temu |
|
armop.inc
|
9d1646e2a8
Add support for writeback in RFE and SRS instructions.
|
9 lat temu |
|
armreg.dat
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 lat temu |
|
armtab.inc
|
c564acd378
* fix assembling of vfnm*
|
9 lat temu |
|
cgcpu.pas
|
aa1be3276f
- removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol():
|
9 lat temu |
|
cpubase.pas
|
ad71b8348e
* S1..S15 do not need to be marked as volatile as they are sub-registers of double size registers
|
9 lat temu |
|
cpuelf.pas
|
86940dfb32
AROS: added arm-aros target to compiler and fpcmake
|
8 lat temu |
|
cpuinfo.pas
|
6a1c1e4f29
Added support for NRF52832 controllers.
|
9 lat temu |
|
cpunode.pas
|
a0efde8167
* automatically generate necessary indirect symbols when a new assembler
|
9 lat temu |
|
cpupara.pas
|
cb4773432b
+ hardfloat directive (arm only): use hard float calling conventions regardless of the abi, resolves #29715
|
9 lat temu |
|
cpupi.pas
|
1c067e96bf
* fix VFPv4 support
|
9 lat temu |
|
cputarg.pas
|
86940dfb32
AROS: added arm-aros target to compiler and fpcmake
|
8 lat temu |
|
hlcgcpu.pas
|
aa1be3276f
- removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol():
|
9 lat temu |
|
itcpugas.pas
|
47d43750e4
* remove unused units from uses statements
|
12 lat temu |
|
narmadd.pas
|
e1546303f8
+ enable use of vfma and friends on arm when doing fastmath optimizations
|
9 lat temu |
|
narmcal.pas
|
657aa06360
arm: arm-aros syscall support
|
8 lat temu |
|
narmcnv.pas
|
1c067e96bf
* fix VFPv4 support
|
9 lat temu |
|
narmcon.pas
|
b0ff41406a
* grouped all tai_real* types into a single tai_realconst type,
|
11 lat temu |
|
narminl.pas
|
1e9491550d
nutils.pas: Add new procedure:
|
9 lat temu |
|
narmmat.pas
|
1c067e96bf
* fix VFPv4 support
|
9 lat temu |
|
narmmem.pas
|
d6de2c03cb
* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe
|
10 lat temu |
|
narmset.pas
|
da696057ab
* converted register_maybe_adjust_setbase() to the high level code generator
|
9 lat temu |
|
pp.lpi.template
|
1f032375c3
* improved template with help from Mattias Gaertner
|
19 lat temu |
|
raarm.pas
|
780e75bfac
o patch by Jeppe Johansen to fix mantis #17472:
|
14 lat temu |
|
raarmgas.pas
|
aa1be3276f
- removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol():
|
9 lat temu |
|
rarmcon.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 lat temu |
|
rarmdwa.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 lat temu |
|
rarmnor.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 lat temu |
|
rarmnum.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 lat temu |
|
rarmrni.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 lat temu |
|
rarmsri.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 lat temu |
|
rarmsta.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 lat temu |
|
rarmstd.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 lat temu |
|
rarmsup.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 lat temu |
|
rgcpu.pas
|
6207a53f5d
* never allocate odd numbered single-sized registers
|
9 lat temu |
|
symcpu.pas
|
657aa06360
arm: arm-aros syscall support
|
8 lat temu |
Károly Balogh
657aa06360
arm: arm-aros syscall support