florian 39f7172ee8 * do no generated debug comment in assembler output of RiscV if not requested 1 anno fa
..
aoptcpu.pas 39f7172ee8 * do no generated debug comment in assembler output of RiscV if not requested 1 anno fa
aoptcpub.pas 9b0ff05ee8 - get rid of MaxOps, it is redundant with max_operands 6 anni fa
aoptcpuc.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 anni fa
aoptcpud.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 anni fa
cgcpu.pas 39f7172ee8 * do no generated debug comment in assembler output of RiscV if not requested 1 anno fa
cpuinfo.pas 0a88683310 + do do_consttovar on RiscV 1 anno fa
cpunode.pas 6352328f3a Update packages with information about RiscV. 7 anni fa
cpupara.pas 1e3f72403e * renamed getintparaloc to getcgtempparaloc 5 anni fa
cpupi.pas 281b3ad276 * fix case completeness and unreachable code warnings in compiler that would 6 anni fa
cputarg.pas d1fb44044f * unified RiscV32 and RiscV64 GAS readers 4 anni fa
hlcgcpu.pas d4c9e1f260 Replace outdated cgop2string function by tcgsize2str function from cgbase unit to fix EXTDEBUG cycle on powerpc64le-linux 5 anni fa
nrv64add.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 anni fa
nrv64cal.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 anni fa
nrv64cnv.pas f3b7e3281a * fix int to real for non-register locations 7 anni fa
nrv64ld.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 anni fa
nrv64mat.pas 28f25b2df0 * reworked usage of tcgnotnode.handle_locjump 5 anni fa
rrv64con.inc eaeb8b70ff + added Risc-V register information file generation to the compiler Makefile 3 anni fa
rrv64dwa.inc eaeb8b70ff + added Risc-V register information file generation to the compiler Makefile 3 anni fa
rrv64nor.inc eaeb8b70ff + added Risc-V register information file generation to the compiler Makefile 3 anni fa
rrv64num.inc eaeb8b70ff + added Risc-V register information file generation to the compiler Makefile 3 anni fa
rrv64rni.inc eaeb8b70ff + added Risc-V register information file generation to the compiler Makefile 3 anni fa
rrv64sri.inc eaeb8b70ff + added Risc-V register information file generation to the compiler Makefile 3 anni fa
rrv64sta.inc eaeb8b70ff + added Risc-V register information file generation to the compiler Makefile 3 anni fa
rrv64std.inc eaeb8b70ff + added Risc-V register information file generation to the compiler Makefile 3 anni fa
rrv64sup.inc eaeb8b70ff + added Risc-V register information file generation to the compiler Makefile 3 anni fa
symcpu.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 anni fa
tripletcpu.pas 52147baa04 * correct tripletcpustr, resolves #40301 2 anni fa