cpuinfo.pas 3.6 KB

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  1. {
  2. Copyright (c) 1998-2002 by the Free Pascal development team
  3. Basic Processor information for AArch64
  4. See the file COPYING.FPC, included in this distribution,
  5. for details about the copyright.
  6. This program is distributed in the hope that it will be useful,
  7. but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  9. **********************************************************************}
  10. Unit CPUInfo;
  11. Interface
  12. uses
  13. globtype;
  14. Type
  15. bestreal = double;
  16. {$if FPC_FULLVERSION>20700}
  17. bestrealrec = TDoubleRec;
  18. {$endif FPC_FULLVERSION>20700}
  19. ts32real = single;
  20. ts64real = double;
  21. ts80real = type extended;
  22. ts128real = type extended;
  23. ts64comp = comp;
  24. pbestreal=^bestreal;
  25. { possible supported processors for this target }
  26. tcputype =
  27. (cpu_none,
  28. cpu_armv8
  29. );
  30. Type
  31. tfputype =
  32. (fpu_none,
  33. fpu_vfp
  34. );
  35. tcontrollertype =
  36. (ct_none
  37. );
  38. tcontrollerdatatype = record
  39. controllertypestr, controllerunitstr: string[20];
  40. cputype: tcputype; fputype: tfputype;
  41. flashbase, flashsize, srambase, sramsize, eeprombase, eepromsize, bootbase, bootsize: dword;
  42. end;
  43. Const
  44. { Is there support for dealing with multiple microcontrollers available }
  45. { for this platform? }
  46. ControllerSupport = false; (* Not yet at least ;-) *)
  47. {# Size of native extended floating point type }
  48. extended_size = 8;
  49. { target cpu string (used by compiler options) }
  50. target_cpu_string = 'aarch64';
  51. { We know that there are fields after sramsize
  52. but we don't care about this warning }
  53. {$PUSH}
  54. {$WARN 3177 OFF}
  55. embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
  56. (
  57. (controllertypestr:''; controllerunitstr:''; cputype:cpu_none; fputype:fpu_none; flashbase:0; flashsize:0; srambase:0; sramsize:0));
  58. {$POP}
  59. { calling conventions supported by the code generator }
  60. supported_calling_conventions : tproccalloptions = [
  61. pocall_internproc,
  62. pocall_safecall,
  63. pocall_stdcall,
  64. { same as stdcall only different name mangling }
  65. pocall_cdecl,
  66. { same as stdcall only different name mangling }
  67. pocall_cppdecl,
  68. { same as stdcall but floating point numbers are handled like equal sized integers }
  69. pocall_softfloat,
  70. { same as stdcall (requires that all const records are passed by
  71. reference, but that's already done for stdcall) }
  72. pocall_mwpascal,
  73. { used for interrupt handling }
  74. pocall_interrupt
  75. ];
  76. cputypestr : array[tcputype] of string[8] = ('',
  77. 'ARMV8'
  78. );
  79. fputypestr : array[tfputype] of string[9] = ('',
  80. 'VFP'
  81. );
  82. { Supported optimizations, only used for information }
  83. supported_optimizerswitches = genericlevel1optimizerswitches+
  84. genericlevel2optimizerswitches+
  85. genericlevel3optimizerswitches-
  86. { no need to write info about those }
  87. [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
  88. [cs_opt_regvar,cs_opt_loopunroll,cs_opt_tailrecursion,
  89. cs_opt_nodecse,cs_opt_reorder_fields,cs_opt_fastmath];
  90. level1optimizerswitches = genericlevel1optimizerswitches;
  91. level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +
  92. [cs_opt_regvar,cs_opt_stackframe,cs_opt_tailrecursion,cs_opt_nodecse];
  93. level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [{,cs_opt_loopunroll}];
  94. level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
  95. Implementation
  96. end.