ncpuinl.pas 6.2 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generates ARM inline nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncpuinl;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ninl,ncginl;
  22. type
  23. taarch64inlinenode = class(tcgInlineNode)
  24. function first_abs_real: tnode; override;
  25. function first_sqr_real: tnode; override;
  26. function first_sqrt_real: tnode; override;
  27. function first_round_real: tnode; override;
  28. function first_trunc_real: tnode; override;
  29. procedure second_abs_real; override;
  30. procedure second_sqr_real; override;
  31. procedure second_sqrt_real; override;
  32. procedure second_abs_long; override;
  33. procedure second_round_real; override;
  34. procedure second_trunc_real; override;
  35. procedure second_get_frame; override;
  36. private
  37. procedure load_fpu_location;
  38. end;
  39. implementation
  40. uses
  41. globtype,verbose,globals,
  42. cpuinfo, defutil,symdef,aasmdata,aasmcpu,
  43. cgbase,cgutils,pass_1,pass_2,
  44. cpubase,ncgutil,cgobj,cgcpu, hlcgobj;
  45. {*****************************************************************************
  46. taarch64inlinenode
  47. *****************************************************************************}
  48. procedure taarch64inlinenode.load_fpu_location;
  49. begin
  50. secondpass(left);
  51. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,true);
  52. location_copy(location,left.location);
  53. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
  54. location.loc:=LOC_MMREGISTER;
  55. end;
  56. function taarch64inlinenode.first_abs_real : tnode;
  57. begin
  58. expectloc:=LOC_MMREGISTER;
  59. result:=nil;
  60. end;
  61. function taarch64inlinenode.first_sqr_real : tnode;
  62. begin
  63. expectloc:=LOC_MMREGISTER;
  64. result:=nil;
  65. end;
  66. function taarch64inlinenode.first_sqrt_real : tnode;
  67. begin
  68. expectloc:=LOC_MMREGISTER;
  69. result:=nil;
  70. end;
  71. function taarch64inlinenode.first_round_real: tnode;
  72. begin
  73. expectloc:=LOC_MMREGISTER;
  74. result:=nil;
  75. end;
  76. function taarch64inlinenode.first_trunc_real: tnode;
  77. begin
  78. expectloc:=LOC_MMREGISTER;
  79. result:=nil;
  80. end;
  81. procedure taarch64inlinenode.second_abs_real;
  82. begin
  83. load_fpu_location;
  84. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FABS,location.register,left.location.register));
  85. end;
  86. procedure taarch64inlinenode.second_sqr_real;
  87. begin
  88. load_fpu_location;
  89. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_FMUL,location.register,left.location.register,left.location.register));
  90. end;
  91. procedure taarch64inlinenode.second_sqrt_real;
  92. begin
  93. load_fpu_location;
  94. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FSQRT,location.register,left.location.register));
  95. end;
  96. procedure taarch64inlinenode.second_abs_long;
  97. var
  98. opsize : tcgsize;
  99. begin
  100. secondpass(left);
  101. opsize:=def_cgsize(left.resultdef);
  102. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  103. location:=left.location;
  104. location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  105. current_asmdata.CurrAsmList.concat(setoppostfix(taicpu.op_reg_reg(A_NEG,location.register,left.location.register),PF_S));
  106. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg_cond(A_CSEL,location.register,location.register,left.location.register,C_GE));
  107. end;
  108. procedure taarch64inlinenode.second_round_real;
  109. var
  110. hreg: tregister;
  111. begin
  112. secondpass(left);
  113. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,true);
  114. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  115. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  116. hreg:=cg.getmmregister(current_asmdata.CurrAsmList,left.location.size);
  117. { round as floating point using current rounding mode }
  118. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FRINTX,hreg,left.location.register));
  119. { convert to signed integer rounding towards zero (there's no "round to
  120. integer using current rounding mode") }
  121. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FCVTZS,location.register,hreg));
  122. end;
  123. procedure taarch64inlinenode.second_trunc_real;
  124. begin
  125. secondpass(left);
  126. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,true);
  127. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  128. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  129. { convert to signed integer rounding towards zero }
  130. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FCVTZS,location.register,left.location.register));
  131. end;
  132. procedure taarch64inlinenode.second_get_frame;
  133. begin
  134. location_reset(location,LOC_CREGISTER,OS_ADDR);
  135. { this routine is used to get the frame pointer for backtracing
  136. purposes. current_procinfo.framepointer is set to SP because that one
  137. is used to access temps. On most platforms these two frame pointers
  138. are the same, but not on AArch64. }
  139. location.register:=NR_FRAME_POINTER_REG;
  140. end;
  141. begin
  142. cinlinenode:=taarch64inlinenode;
  143. end.