.. |
aasmcpu.pas
|
4056194e7c
* don't ignore by accident the next instruction after a newly inserted constant pool
|
12 years ago |
agarmgas.pas
|
07762e5c25
+ proper assembler command line parameters for arm thumb
|
12 years ago |
aoptcpu.pas
|
f3273fa87d
Optimize Add/Sub+Ldr/Str by using preindexed references
|
12 years ago |
aoptcpub.pas
|
7e5b8584cf
* set MaxOps to 4 for the optimizer because fpc generates now mla instructions
|
13 years ago |
aoptcpuc.pas
|
790a4fe2d3
* log and id tags removed
|
20 years ago |
aoptcpud.pas
|
790a4fe2d3
* log and id tags removed
|
20 years ago |
armatt.inc
|
ac4a6accd3
+ SVC instruction
|
12 years ago |
armatts.inc
|
ac4a6accd3
+ SVC instruction
|
12 years ago |
armins.dat
|
ac4a6accd3
+ SVC instruction
|
12 years ago |
armnop.inc
|
666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
|
12 years ago |
armop.inc
|
ac4a6accd3
+ SVC instruction
|
12 years ago |
armreg.dat
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
12 years ago |
armtab.inc
|
666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
|
12 years ago |
cgcpu.pas
|
0bb8d24e24
Add some immediate forms of shift instructions to tcgthumb.a_op_const_reg
|
12 years ago |
cpubase.pas
|
086ae4b999
Merge r22905 and r22906
|
12 years ago |
cpuelf.pas
|
32ffddaad8
+ ELF linker back-ends for ARM and MIPS.
|
12 years ago |
cpuinfo.pas
|
0e9b8adb7a
patch by Michael Ring:
|
12 years ago |
cpunode.pas
|
638d0d49c0
+ take advantage of the mla instruction when calculating array offsets
|
13 years ago |
cpupara.pas
|
9938169d2c
* don't use the paracgsize in get_paraloc_def(), because it generally
|
12 years ago |
cpupi.pas
|
7ba197a221
* fix stack parameter handling for arm thumb
|
12 years ago |
cputarg.pas
|
d26f0552a0
* Sync with trunk r23404.
|
12 years ago |
hlcgcpu.pas
|
72e9cfee24
* create/destroy also the high level code generator for all architectures,
|
14 years ago |
itcpugas.pas
|
47d43750e4
* remove unused units from uses statements
|
12 years ago |
narmadd.pas
|
3a393f839e
* do not reuse register locations on arm fpa/vfp
|
12 years ago |
narmcal.pas
|
8b8a786823
* moved ARM/x86 ifdef'ed code from ncgcal to virtual methods
|
12 years ago |
narmcnv.pas
|
5051453806
+ support for LOC_(C)MMREGISTER in hlcg
|
12 years ago |
narmcon.pas
|
47d43750e4
* remove unused units from uses statements
|
12 years ago |
narminl.pas
|
5051453806
+ support for LOC_(C)MMREGISTER in hlcg
|
12 years ago |
narmmat.pas
|
570b40faed
Signed modulus by 2 on ARM with no division is optimized to a series of instructions instead of calling fpc_mod_longint.
|
12 years ago |
narmmem.pas
|
36a32e153d
+ arm thumb: tarmloadparentfpnode moves the stack pointer to a different register to avoid illegal instruction encodings
|
12 years ago |
narmset.pas
|
e5066a5f43
Update jumptabel generation for ARM Thumb
|
12 years ago |
pp.lpi.template
|
1f032375c3
* improved template with help from Mattias Gaertner
|
19 years ago |
raarm.pas
|
780e75bfac
o patch by Jeppe Johansen to fix mantis #17472:
|
14 years ago |
raarmgas.pas
|
47d43750e4
* remove unused units from uses statements
|
12 years ago |
rarmcon.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
12 years ago |
rarmdwa.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
12 years ago |
rarmnor.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
12 years ago |
rarmnum.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
12 years ago |
rarmrni.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
12 years ago |
rarmsri.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
12 years ago |
rarmsta.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
12 years ago |
rarmstd.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
12 years ago |
rarmsup.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
12 years ago |
rgcpu.pas
|
1de40c8de7
* arm thumb: fix spilling with offsets >1020
|
12 years ago |