pierre fb50d0860b Use BX register instead of AX to reload DS at proc entry if register convention is used 9 éve
..
aasmcpu.pas ec92bc3390 * case of identifiers fixed 9 éve
agx86att.pas 1c0c944311 Added x86_64-embedded target. Patch from Benjamin Rosseaux 9 éve
agx86int.pas 90b284e169 + generate .debug_aranges sections for dwarf debug info: enables faster address to debug info translation 9 éve
agx86nsm.pas c2305809dc + added an i8086-embedded target support to the compiler (RTL and makefile 9 éve
aoptx86.pas d31d24ed16 * r33995 was not complete 9 éve
cga.pas d88d644925 + support for FMA intrinsic: if there is no hardware support, the compiler throws an error. 11 éve
cgx86.pas fb50d0860b Use BX register instead of AX to reload DS at proc entry if register convention is used 9 éve
cpubase.pas 2861362780 * Reuse binary search routine from rgbase.pas to look up AT&T register names, removes need in regnumber_count_bsstart constant. Resolves #29471. 9 éve
hlcgx86.pas 67b8aceaee * synchronized with privatetrunk till r30095 10 éve
itcpugas.pas 2861362780 * Reuse binary search routine from rgbase.pas to look up AT&T register names, removes need in regnumber_count_bsstart constant. Resolves #29471. 9 éve
itx86int.pas 0e41df598e * merge i8086 branch by Nikolay Nikolov 12 éve
ni86mem.pas 4a79481c51 * isolated segment-related functionality of tabsolutevarsym into i386/i8086- 11 éve
nx86add.pas da696057ab * converted register_maybe_adjust_setbase() to the high level code generator 9 éve
nx86cal.pas 8046826e4e + also allow x86 call ref for references that contain only non-imaginary registers (no infinite spilling problems there either) 9 éve
nx86cnv.pas 0fc1fd6ac1 * replaced current_procinfo.currtrue/falselabel with storing the true/false 10 éve
nx86con.pas 45f60bc4b5 * small changes (copyright, typo, readability) 12 éve
nx86inl.pas e4baf67722 * do not write any size suffix for cvt*ss2si, doing so makes no sense as the size of the single and the integer might be different on x86-64, resolves issue #30101 9 éve
nx86ld.pas c4449fc5e6 nx86ld.pas, tx86loadnode: 9 éve
nx86mat.pas 49f63d67b2 * correctly check left.location instead of left.expectloc when generating 9 éve
nx86mem.pas d6de2c03cb * generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe 10 éve
nx86set.pas 57f93ed40d * correctly generate accesses to jump tables if it contains negative entries, resolves issue #30119 9 éve
rax86.pas 8d5cc3dfa4 * (extended and modified) patch by Emelyanov Roman to add suport of RDRAND, RDSEED and TSX instructions set, resolves issue #29893. 9 éve
rax86att.pas 42d251da1c - x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability. 10 éve
rax86int.pas f69f6336e9 * Replaced hacks with resetting 'c' to zero and decreasing inputpointer by boolean parameter to skipcomment and skipoldtpcomment. This parameter specifies whether first character of comment should be read. 9 éve
rgx86.pas 180e0e7561 * avoid spilling of 2nd and 3rd operand of avx instructions 9 éve
symi86.pas 4f7b4a2735 * changed {$ifdef x86} code in defcmp into virtual methods 10 éve
symx86.pas 33d711794e * adaptation for symx86 to r32340 9 éve
x86ins.dat a7516dfb50 * fix modification information of VCOMISS and VCOMISD 9 éve
x86reg.dat 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve