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aasmcpu.pas
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fe30b53e95
* use 16-bit operand types for call/jmp immediate on i8086 in taicpu.create_ot
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10 anni fa |
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agx86att.pas
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79a06b1514
+ iphonesim/x86_64 target (64 bit iOS simulator)
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10 anni fa |
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agx86int.pas
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67b8aceaee
* synchronized with privatetrunk till r30095
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10 anni fa |
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agx86nsm.pas
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6a7fff644a
* align non-code sections with zeros, instead of nops in the nasm asm output
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10 anni fa |
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cga.pas
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d88d644925
+ support for FMA intrinsic: if there is no hardware support, the compiler throws an error.
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11 anni fa |
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cgx86.pas
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67b8aceaee
* synchronized with privatetrunk till r30095
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10 anni fa |
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cpubase.pas
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9d4c8f68d4
* fixed first_fpu_immreg definition
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10 anni fa |
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hlcgx86.pas
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67b8aceaee
* synchronized with privatetrunk till r30095
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10 anni fa |
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itcpugas.pas
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926dd1b41e
* command line compilation of i8086 fixed
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12 anni fa |
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itx86int.pas
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0e41df598e
* merge i8086 branch by Nikolay Nikolov
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12 anni fa |
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ni86mem.pas
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4a79481c51
* isolated segment-related functionality of tabsolutevarsym into i386/i8086-
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11 anni fa |
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nx86add.pas
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249a60b28b
x86: fix a variable op not initialized warning. This hopefully fixes our x86 testsuite run.
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11 anni fa |
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nx86cal.pas
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81427523ab
* pass a list of (pointers to) the paralocs to hlcgobj.a_call/g_call*, as
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11 anni fa |
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nx86cnv.pas
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687bb15299
* renamed getdatalabel() to getglobaldatalabel
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10 anni fa |
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nx86con.pas
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45f60bc4b5
* small changes (copyright, typo, readability)
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12 anni fa |
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nx86inl.pas
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9079227c56
* don't give an internalerror when trying to prefetch a regvar or even
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10 anni fa |
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nx86mat.pas
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687bb15299
* renamed getdatalabel() to getglobaldatalabel
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10 anni fa |
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nx86mem.pas
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d6de2c03cb
* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe
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10 anni fa |
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nx86set.pas
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687bb15299
* renamed getdatalabel() to getglobaldatalabel
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10 anni fa |
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rax86.pas
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42d251da1c
- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.
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10 anni fa |
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rax86att.pas
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42d251da1c
- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.
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10 anni fa |
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rax86int.pas
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d6e4af8279
+ applied remaining patches of Torsten Grundke: adds gather instructions of avx2
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10 anni fa |
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rgx86.pas
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7949bebb8d
* synchronised with r28168 of trunk
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11 anni fa |
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symi86.pas
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fc71081b74
* i8086 and i386-specific code from tabstractprocdef.is_pushleftright moved to
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11 anni fa |
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symx86.pas
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94bcb9878a
* reimplemented r28329 in a different way, as suggested by Jonas
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11 anni fa |
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x86ins.dat
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99635658ec
* corrects change flags for VSQRTSD
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10 anni fa |
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x86reg.dat
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
nickysn
fe30b53e95
* use 16-bit operand types for call/jmp immediate on i8086 in taicpu.create_ot