aoptcpu.pas 32 KB

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  1. {
  2. Copyright (c) 1998-2004 by Jonas Maebe
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for sparc
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. Interface
  21. uses
  22. cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai, aasmcpu;
  23. Type
  24. TAsmOpSet = set of TAsmOp;
  25. TCpuAsmOptimizer = class(TAsmOptimizer)
  26. function RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean; override;
  27. function GetNextInstructionUsingReg(Current: tai;
  28. var Next: tai; reg: TRegister): Boolean;
  29. function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  30. function TryRemoveMovToRefIndex(var p: tai; next: taicpu): boolean;
  31. function TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
  32. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  33. procedure PeepHoleOptPass2; override;
  34. End;
  35. Implementation
  36. uses
  37. cutils,globals,aasmbase,cpuinfo,verbose;
  38. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  39. begin
  40. result :=
  41. (instr.typ = ait_instruction) and
  42. (taicpu(instr).opcode = op);
  43. end;
  44. function MatchOperand(const oper: TOper; reg: TRegister): boolean;
  45. begin
  46. result:=(oper.typ=top_reg) and (oper.reg=reg);
  47. end;
  48. function IsSameReg(this,next: taicpu): boolean;
  49. begin
  50. result:=(next.oper[0]^.typ=top_reg) and
  51. (next.oper[1]^.typ=top_reg) and
  52. (next.oper[0]^.reg=next.oper[1]^.reg) and
  53. (next.oper[0]^.reg=this.oper[0]^.reg);
  54. end;
  55. function regLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  56. var
  57. p: taicpu;
  58. begin
  59. p:=taicpu(hp);
  60. result:=false;
  61. if not ((assigned(hp)) and (hp.typ=ait_instruction)) then
  62. exit;
  63. case p.opcode of
  64. { These instructions do not write into a register at all }
  65. A_NOP,
  66. A_C_EQ_D,A_C_EQ_S,A_C_LE_D,A_C_LE_S,A_C_LT_D,A_C_LT_S,
  67. A_BA,A_BC,
  68. A_SB,A_SH,A_SW,A_SWL,A_SWR,A_SWC1,A_SDC1:
  69. exit;
  70. end;
  71. result:=(p.ops>0) and (p.oper[0]^.typ=top_reg) and
  72. (p.oper[0]^.reg=reg);
  73. end;
  74. function CanBeCMOV(p: tai; condreg: tregister): boolean;
  75. begin
  76. result:=assigned(p) and (p.typ=ait_instruction) and
  77. ((taicpu(p).opcode in [A_MOV_D,A_MOV_S]) or
  78. (
  79. { register with condition must not be overwritten }
  80. (taicpu(p).opcode=A_MOVE) and
  81. (taicpu(p).oper[0]^.reg<>condreg)
  82. ));
  83. end;
  84. procedure ChangeToCMOV(p: taicpu; cond: tasmcond; reg: tregister);
  85. begin
  86. case cond of
  87. C_COP1TRUE:
  88. case p.opcode of
  89. A_MOV_D: p.opcode:=A_MOVT_D;
  90. A_MOV_S: p.opcode:=A_MOVT_S;
  91. A_MOVE: p.opcode:=A_MOVT;
  92. else
  93. InternalError(2014061701);
  94. end;
  95. C_COP1FALSE:
  96. case p.opcode of
  97. A_MOV_D: p.opcode:=A_MOVF_D;
  98. A_MOV_S: p.opcode:=A_MOVF_S;
  99. A_MOVE: p.opcode:=A_MOVF;
  100. else
  101. InternalError(2014061702);
  102. end;
  103. C_EQ:
  104. case p.opcode of
  105. A_MOV_D: p.opcode:=A_MOVZ_D;
  106. A_MOV_S: p.opcode:=A_MOVZ_S;
  107. A_MOVE: p.opcode:=A_MOVZ;
  108. else
  109. InternalError(2014061703);
  110. end;
  111. C_NE:
  112. case p.opcode of
  113. A_MOV_D: p.opcode:=A_MOVN_D;
  114. A_MOV_S: p.opcode:=A_MOVN_S;
  115. A_MOVE: p.opcode:=A_MOVN;
  116. else
  117. InternalError(2014061704);
  118. end;
  119. else
  120. InternalError(2014061705);
  121. end;
  122. p.ops:=3;
  123. p.loadreg(2,reg);
  124. end;
  125. function instructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  126. var
  127. p: taicpu;
  128. i: longint;
  129. begin
  130. result:=false;
  131. if not (assigned(hp) and (hp.typ=ait_instruction)) then
  132. exit;
  133. p:=taicpu(hp);
  134. i:=1;
  135. while(i<p.ops) do
  136. begin
  137. case p.oper[I]^.typ of
  138. top_reg:
  139. result:=(p.oper[I]^.reg=reg) and (I<2);
  140. top_ref:
  141. result:=
  142. (p.oper[I]^.ref^.base=reg) or
  143. (p.oper[I]^.ref^.index=reg);
  144. end;
  145. if result then exit; {Bailout if we found something}
  146. Inc(I);
  147. end;
  148. end;
  149. function TCpuAsmOptimizer.RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean;
  150. var
  151. i : Longint;
  152. begin
  153. result:=false;
  154. for i:=0 to taicpu(p1).ops-1 do
  155. if (taicpu(p1).oper[i]^.typ=top_reg) and (taicpu(p1).oper[i]^.reg=Reg) and (taicpu(p1).spilling_get_operation_type(i) in [operand_write,operand_readwrite]) then
  156. begin
  157. result:=true;
  158. exit;
  159. end;
  160. end;
  161. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  162. var Next: tai; reg: TRegister): Boolean;
  163. begin
  164. Next:=Current;
  165. repeat
  166. Result:=GetNextInstruction(Next,Next);
  167. until {not(cs_opt_level3 in current_settings.optimizerswitches) or} not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  168. (is_calljmp(taicpu(Next).opcode));
  169. if Result and (next.typ=ait_instruction) and is_calljmp(taicpu(next).opcode) then
  170. begin
  171. result:=false;
  172. next:=nil;
  173. end;
  174. end;
  175. function TCpuAsmOptimizer.TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  176. var
  177. next,hp1: tai;
  178. alloc,dealloc: tai_regalloc;
  179. begin
  180. { Fold
  181. op $reg1,...
  182. opcode $reg2,$reg1
  183. dealloc $reg1
  184. into
  185. op $reg2,...
  186. opcode may be A_MOVE, A_MOV_s, A_MOV_d, etc.
  187. }
  188. result:=false;
  189. if (taicpu(p).ops>0) and
  190. GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  191. MatchInstruction(next,opcode) and
  192. MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) and
  193. { the destination register of mov cannot be used between p and next }
  194. (not RegUsedBetween(taicpu(next).oper[0]^.reg,p,next)) then
  195. begin
  196. dealloc:=FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.Next));
  197. if assigned(dealloc) then
  198. begin
  199. { taicpu(p).oper[0]^.reg is not used anymore, try to find its allocation
  200. and remove it if possible }
  201. GetLastInstruction(p,hp1);
  202. asml.Remove(dealloc);
  203. alloc:=FindRegAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  204. if assigned(alloc) then
  205. begin
  206. asml.Remove(alloc);
  207. alloc.free;
  208. dealloc.free;
  209. end
  210. else
  211. asml.InsertAfter(dealloc,p);
  212. { try to move the allocation of the target register }
  213. GetLastInstruction(next,hp1);
  214. alloc:=FindRegAlloc(taicpu(next).oper[0]^.reg,tai(hp1.Next));
  215. if assigned(alloc) then
  216. begin
  217. asml.Remove(alloc);
  218. asml.InsertBefore(alloc,p);
  219. { adjust used regs }
  220. IncludeRegInUsedRegs(taicpu(next).oper[0]^.reg,UsedRegs);
  221. end;
  222. { finally get rid of the mov }
  223. taicpu(p).loadreg(0,taicpu(next).oper[0]^.reg);
  224. asml.remove(next);
  225. next.free;
  226. result:=true;
  227. end
  228. else // no dealloc found
  229. begin
  230. { try to optimize the typical call sequence
  231. lw $reg, (whatever)
  232. <alloc volatile registers>
  233. move $t9,$reg
  234. jalr $t9 }
  235. if (opcode=A_MOVE) and
  236. (taicpu(next).oper[0]^.reg=NR_R25) and
  237. GetNextInstruction(next,hp1) and
  238. MatchInstruction(hp1,A_JALR) and
  239. MatchOperand(taicpu(hp1).oper[0]^,NR_R25) then
  240. begin
  241. taicpu(p).loadreg(0,taicpu(next).oper[0]^.reg);
  242. asml.remove(next);
  243. next.free;
  244. result:=true;
  245. end;
  246. end;
  247. end;
  248. end;
  249. function TCpuAsmOptimizer.TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
  250. begin
  251. result:=(next.opcode in storeops) and
  252. MatchOperand(next.oper[0]^,taicpu(p).oper[0]^.reg) and
  253. { Ry cannot be modified between move and store }
  254. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  255. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
  256. if result then
  257. begin
  258. next.loadreg(0,taicpu(p).oper[1]^.reg);
  259. asml.remove(p);
  260. p.free;
  261. p:=next;
  262. end;
  263. end;
  264. function TCpuAsmOptimizer.TryRemoveMovToRefIndex(var p: tai; next: taicpu): boolean;
  265. begin
  266. result:=(next.oper[1]^.typ=top_ref) and
  267. (next.oper[1]^.ref^.base=taicpu(p).oper[0]^.reg) and
  268. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  269. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
  270. if result then
  271. begin
  272. next.oper[1]^.ref^.base:=taicpu(p).oper[1]^.reg;
  273. asml.remove(p);
  274. p.free;
  275. p:=next;
  276. end;
  277. end;
  278. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  279. var
  280. next,next2: tai;
  281. begin
  282. result:=false;
  283. case p.typ of
  284. ait_instruction:
  285. begin
  286. case taicpu(p).opcode of
  287. A_SEH:
  288. begin
  289. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  290. MatchInstruction(next,A_SH) and
  291. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) and
  292. (not RegUsedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  293. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  294. begin
  295. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  296. asml.remove(p);
  297. p.free;
  298. p:=next;
  299. end
  300. else
  301. TryRemoveMov(p,A_MOVE);
  302. end;
  303. A_SEB:
  304. { TODO: can be handled similar to A_SEH, but it's almost never encountered }
  305. TryRemoveMov(p,A_MOVE);
  306. A_SLL:
  307. begin
  308. { if this is a sign extension... }
  309. if (taicpu(p).oper[2]^.typ=top_const) and
  310. GetNextInstruction(p,next) and
  311. MatchInstruction(next,A_SRA) and
  312. IsSameReg(taicpu(p),taicpu(next)) and
  313. (taicpu(next).oper[2]^.typ=top_const) and
  314. (taicpu(next).oper[2]^.val=taicpu(p).oper[2]^.val) and
  315. (taicpu(next).oper[2]^.val=16) and
  316. { ...followed by 16-bit store (possibly with PIC simplification, etc. in between) }
  317. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[0]^.reg) and
  318. MatchInstruction(next2,A_SH) and
  319. (taicpu(next2).oper[0]^.typ=top_reg) and
  320. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  321. { the initial register may not be reused }
  322. (not RegUsedBetween(taicpu(p).oper[1]^.reg,next,next2)) then
  323. begin
  324. if Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next2.next))) then
  325. begin
  326. taicpu(next2).loadreg(0,taicpu(p).oper[1]^.reg);
  327. asml.remove(p);
  328. asml.remove(next);
  329. p.free;
  330. next.free;
  331. p:=next2;
  332. end;
  333. end
  334. else
  335. TryRemoveMov(p,A_MOVE);
  336. end;
  337. A_SRL:
  338. begin
  339. { TODO: also kill sign-extensions that follow, both SLL+SRA and SEB/SEH versions }
  340. { Remove 'andi' in sequences
  341. srl Rx,Ry,16
  342. andi Rx,Rx,65535
  343. srl Rx,Ry,24
  344. andi Rx,Rx,255
  345. since 'srl' clears all relevant upper bits }
  346. if (taicpu(p).oper[2]^.typ=top_const) and
  347. GetNextInstruction(p,next) and
  348. MatchInstruction(next,A_ANDI) and
  349. IsSameReg(taicpu(p),taicpu(next)) and
  350. (taicpu(next).oper[2]^.typ=top_const) and
  351. ((
  352. (taicpu(p).oper[2]^.val>=16) and
  353. (taicpu(next).oper[2]^.val=65535)
  354. ) or (
  355. (taicpu(p).oper[2]^.val>=24) and
  356. (taicpu(next).oper[2]^.val=255)
  357. )) then
  358. begin
  359. asml.remove(next);
  360. next.free;
  361. end
  362. else
  363. TryRemoveMov(p,A_MOVE);
  364. end;
  365. A_ANDI:
  366. begin
  367. { Remove sign extension after 'andi' if bit 7/15 of const operand is clear }
  368. if (taicpu(p).oper[2]^.typ=top_const) and
  369. GetNextInstruction(p,next) and
  370. MatchInstruction(next,A_SLL) and
  371. GetNextInstruction(next,next2) and
  372. MatchInstruction(next2,A_SRA) and
  373. IsSameReg(taicpu(p),taicpu(next)) and
  374. IsSameReg(taicpu(p),taicpu(next2)) and
  375. (taicpu(next).oper[2]^.typ=top_const) and
  376. (taicpu(next2).oper[2]^.typ=top_const) and
  377. (taicpu(next).oper[2]^.val=taicpu(next2).oper[2]^.val) and
  378. ((
  379. (taicpu(p).oper[2]^.val<=$7fff) and
  380. (taicpu(next).oper[2]^.val=16)
  381. ) or (
  382. (taicpu(p).oper[2]^.val<=$7f) and
  383. (taicpu(next).oper[2]^.val=24)
  384. )) then
  385. begin
  386. asml.remove(next);
  387. asml.remove(next2);
  388. next.free;
  389. next2.free;
  390. end
  391. { Remove zero extension if register is used only for byte/word memory store }
  392. else if (taicpu(p).oper[2]^.typ=top_const) and
  393. GetNextInstruction(p,next) and
  394. ((taicpu(p).oper[2]^.val=255) and MatchInstruction(next,A_SB)) or
  395. ((taicpu(p).oper[2]^.val=65535) and MatchInstruction(next,A_SH)) and
  396. (taicpu(next).oper[0]^.typ=top_reg) and
  397. (taicpu(next).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  398. assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  399. begin
  400. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  401. asml.remove(p);
  402. p.free;
  403. p:=next;
  404. end
  405. else
  406. TryRemoveMov(p,A_MOVE);
  407. end;
  408. A_MOV_S:
  409. begin
  410. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  411. (next.typ=ait_instruction) then
  412. begin
  413. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SWC1]) then
  414. { optimization successful };
  415. end;
  416. end;
  417. A_MOV_D:
  418. begin
  419. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  420. (next.typ=ait_instruction) then
  421. begin
  422. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SDC1]) then
  423. { optimization successful };
  424. end;
  425. end;
  426. A_MOVE:
  427. begin
  428. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  429. (next.typ=ait_instruction) and
  430. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
  431. begin
  432. { MOVE Rx,Ry; store Rx,(ref); dealloc Rx ==> store Ry,(ref) }
  433. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SB,A_SH,A_SW]) then
  434. { optimization successful }
  435. else if TryRemoveMovToRefIndex(p,taicpu(next)) then
  436. { successful as well }
  437. { MOVE Rx,Ry; opcode Rx,Rx,any ==> opcode Rx,Ry,any
  438. MOVE Rx,Ry; opcode Rx,Rz,Rx ==> opcode Rx,Rz,Ry }
  439. else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU]) and
  440. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
  441. begin
  442. if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  443. begin
  444. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  445. asml.remove(p);
  446. p.free;
  447. p:=next;
  448. end
  449. { TODO: if Ry=NR_R0, this effectively changes instruction into MOVE,
  450. providing further optimization possibilities }
  451. else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) then
  452. begin
  453. taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
  454. asml.remove(p);
  455. p.free;
  456. p:=next;
  457. end;
  458. end
  459. { MOVE Rx,Ry; opcode Rz,Rx,any; dealloc Rx ==> opcode Rz,Ry,any }
  460. else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU,A_SLT,A_SLTU,A_DIV,A_DIVU]) and
  461. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  462. begin
  463. if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  464. begin
  465. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  466. asml.remove(p);
  467. p.free;
  468. p:=next;
  469. end
  470. else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) then
  471. begin
  472. taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
  473. asml.remove(p);
  474. p.free;
  475. p:=next;
  476. end;
  477. end
  478. { MULT[U] must be handled separately due to different operand numbers }
  479. else if (taicpu(next).opcode in [A_MULT,A_MULTU]) and
  480. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  481. begin
  482. if MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
  483. begin
  484. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  485. asml.remove(p);
  486. p.free;
  487. p:=next;
  488. end
  489. else if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  490. begin
  491. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  492. asml.remove(p);
  493. p.free;
  494. p:=next;
  495. end;
  496. end
  497. else if TryRemoveMov(p,A_MOVE) then
  498. begin
  499. { Ended up with move between same register? Suicide then. }
  500. if (taicpu(p).oper[0]^.reg=taicpu(p).oper[1]^.reg) then
  501. begin
  502. GetNextInstruction(p,next);
  503. asml.remove(p);
  504. p.free;
  505. p:=next;
  506. end;
  507. end;
  508. { TODO: MOVE Rx,Ry; Bcc Rx,Rz,label; dealloc Rx ==> Bcc Ry,Rz,label }
  509. end;
  510. end;
  511. A_ADDIU:
  512. begin
  513. { ADDIU Rx,Ry,const; load/store Rz,(Rx); dealloc Rx ==> load/store Rz,const(Ry)
  514. ADDIU Rx,Ry,%lo(sym); load/store Rz,(Rx); dealloc Rx ==> load/store Rz,%lo(sym)(Ry)
  515. ADDIU Rx,Ry,const; load Rx,(Rx) ==> load Rx,const(Ry)
  516. ADDIU Rx,Ry,%lo(sym); load Rx,(Rx) ==> load Rx,%lo(sym)(Ry) }
  517. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  518. (next.typ=ait_instruction) and
  519. (taicpu(next).opcode in [A_LB,A_LBU,A_LH,A_LHU,A_LW,A_SB,A_SH,A_SW]) and
  520. (taicpu(p).oper[0]^.reg=taicpu(next).oper[1]^.ref^.base) and
  521. (taicpu(next).oper[1]^.ref^.offset=0) and
  522. (taicpu(next).oper[1]^.ref^.symbol=nil) and
  523. (
  524. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) or
  525. (
  526. (taicpu(p).oper[0]^.reg=taicpu(next).oper[0]^.reg) and
  527. (taicpu(next).opcode in [A_LB,A_LBU,A_LH,A_LHU,A_LW])
  528. )
  529. ) and
  530. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
  531. begin
  532. case taicpu(p).oper[2]^.typ of
  533. top_const:
  534. taicpu(next).oper[1]^.ref^.offset:=taicpu(p).oper[2]^.val;
  535. top_ref:
  536. taicpu(next).oper[1]^.ref^:=taicpu(p).oper[2]^.ref^;
  537. else
  538. InternalError(2014100401);
  539. end;
  540. taicpu(next).oper[1]^.ref^.base:=taicpu(p).oper[1]^.reg;
  541. asml.remove(p);
  542. p.free;
  543. p:=next;
  544. result:=true;
  545. end
  546. else
  547. result:=TryRemoveMov(p,A_MOVE);
  548. end;
  549. A_LB,A_LBU,A_LH,A_LHU,A_LW,
  550. A_ADD,A_ADDU,
  551. A_ADDI,
  552. A_SUB,A_SUBU,
  553. A_SRA,A_SRAV,
  554. A_SRLV,
  555. A_SLLV,
  556. A_MFLO,A_MFHI,
  557. A_AND,A_OR,A_XOR,A_ORI,A_XORI:
  558. TryRemoveMov(p,A_MOVE);
  559. A_LWC1,
  560. A_ADD_s, A_SUB_s, A_MUL_s, A_DIV_s,
  561. A_ABS_s, A_NEG_s, A_SQRT_s,
  562. A_CVT_s_w, A_CVT_s_l, A_CVT_s_d:
  563. TryRemoveMov(p,A_MOV_s);
  564. A_LDC1,
  565. A_ADD_d, A_SUB_d, A_MUL_d, A_DIV_d,
  566. A_ABS_d, A_NEG_d, A_SQRT_d,
  567. A_CVT_d_w, A_CVT_d_l, A_CVT_d_s:
  568. TryRemoveMov(p,A_MOV_d);
  569. end;
  570. end;
  571. end;
  572. end;
  573. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  574. var
  575. p: tai;
  576. l: longint;
  577. hp1,hp2,hp3: tai;
  578. condition: tasmcond;
  579. condreg: tregister;
  580. begin
  581. { Currently, everything below is mips4+ }
  582. if (current_settings.cputype<cpu_mips4) then
  583. exit;
  584. p:=BlockStart;
  585. ClearUsedRegs;
  586. while (p<>BlockEnd) Do
  587. begin
  588. UpdateUsedRegs(tai(p.next));
  589. case p.typ of
  590. ait_instruction:
  591. begin
  592. case taicpu(p).opcode of
  593. A_BC:
  594. begin
  595. condreg:=NR_NO;
  596. if (taicpu(p).condition in [C_COP1TRUE,C_COP1FALSE]) then
  597. { TODO: must be taken from "p" if/when codegen makes use of multiple %fcc }
  598. condreg:=NR_FCC0
  599. else if (taicpu(p).condition in [C_EQ,C_NE]) then
  600. begin
  601. if (taicpu(p).oper[0]^.reg=NR_R0) then
  602. condreg:=taicpu(p).oper[1]^.reg
  603. else if (taicpu(p).oper[1]^.reg=NR_R0) then
  604. condreg:=taicpu(p).oper[0]^.reg
  605. end;
  606. if (condreg<>NR_NO) then
  607. begin
  608. { check for
  609. bCC xxx
  610. <several movs>
  611. xxx:
  612. }
  613. l:=0;
  614. GetNextInstruction(p, hp1);
  615. while CanBeCMOV(hp1,condreg) do // CanBeCMOV returns False for nil or labels
  616. begin
  617. inc(l);
  618. GetNextInstruction(hp1,hp1);
  619. end;
  620. if assigned(hp1) then
  621. begin
  622. if FindLabel(tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol),hp1) then
  623. begin
  624. if (l<=4) and (l>0) then
  625. begin
  626. condition:=inverse_cond(taicpu(p).condition);
  627. hp2:=p;
  628. GetNextInstruction(p,hp1);
  629. p:=hp1;
  630. repeat
  631. ChangeToCMOV(taicpu(hp1),condition,condreg);
  632. GetNextInstruction(hp1,hp1);
  633. until not CanBeCMOV(hp1,condreg);
  634. { wait with removing else GetNextInstruction could
  635. ignore the label if it was the only usage in the
  636. jump moved away }
  637. tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol).decrefs;
  638. RemoveDelaySlot(hp2);
  639. asml.remove(hp2);
  640. hp2.free;
  641. continue;
  642. end;
  643. end
  644. else
  645. begin
  646. { check further for
  647. bCC xxx
  648. <several movs 1>
  649. b yyy
  650. xxx:
  651. <several movs 2>
  652. yyy:
  653. }
  654. { hp2 points to jmp yyy }
  655. hp2:=hp1;
  656. { skip hp1 to xxx }
  657. GetNextInstruction(hp1, hp1);
  658. if assigned(hp2) and
  659. assigned(hp1) and
  660. (l<=3) and
  661. (hp2.typ=ait_instruction) and
  662. (taicpu(hp2).opcode=A_BA) and
  663. { real label and jump, no further references to the
  664. label are allowed }
  665. (tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol).getrefs<=2) and
  666. FindLabel(tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol),hp1) then
  667. begin
  668. l:=0;
  669. { skip hp1 to <several moves 2> }
  670. GetNextInstruction(hp1, hp1);
  671. while CanBeCMOV(hp1,condreg) do
  672. begin
  673. inc(l);
  674. GetNextInstruction(hp1, hp1);
  675. end;
  676. { hp1 points to yyy: }
  677. if assigned(hp1) and
  678. FindLabel(tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol),hp1) then
  679. begin
  680. condition:=inverse_cond(taicpu(p).condition);
  681. GetNextInstruction(p,hp1);
  682. hp3:=p;
  683. p:=hp1;
  684. repeat
  685. ChangeToCMOV(taicpu(hp1),condition,condreg);
  686. GetNextInstruction(hp1,hp1);
  687. until not CanBeCMOV(hp1,condreg);
  688. { hp2 is still at b yyy }
  689. GetNextInstruction(hp2,hp1);
  690. { hp2 is now at xxx: }
  691. condition:=inverse_cond(condition);
  692. GetNextInstruction(hp1,hp1);
  693. { hp1 is now at <several movs 2> }
  694. repeat
  695. ChangeToCMOV(taicpu(hp1),condition,condreg);
  696. GetNextInstruction(hp1,hp1);
  697. until not CanBeCMOV(hp1,condreg);
  698. { remove bCC }
  699. tasmlabel(taicpu(hp3).oper[taicpu(hp3).ops-1]^.ref^.symbol).decrefs;
  700. RemoveDelaySlot(hp3);
  701. asml.remove(hp3);
  702. hp3.free;
  703. { remove jmp }
  704. tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol).decrefs;
  705. RemoveDelaySlot(hp2);
  706. asml.remove(hp2);
  707. hp2.free;
  708. continue;
  709. end;
  710. end;
  711. end;
  712. end;
  713. end;
  714. end;
  715. end;
  716. end;
  717. end;
  718. UpdateUsedRegs(p);
  719. p:=tai(p.next);
  720. end;
  721. end;
  722. begin
  723. casmoptimizer:=TCpuAsmOptimizer;
  724. end.