sergei 06ee500352 * MIPS: improved code generation in make_simple_ref 10 ani în urmă
..
aasmcpu.pas 4e2fb9d28b * MIPS: fixed O_MOVE_SOURCE and O_MOVE_DEST constants (they were swapped, amazing that it ever worked with such a mistake). 11 ani în urmă
aoptcpu.pas 06ee500352 * MIPS: improved code generation in make_simple_ref 10 ani în urmă
aoptcpub.pas 93e0dd9c2f * Patch from Fuxin Zhang: other mips and mipsel CPUs changes 13 ani în urmă
aoptcpud.pas 0c8546f94c * more MIPS code of David Zhang integrated 15 ani în urmă
cgcpu.pas 06ee500352 * MIPS: improved code generation in make_simple_ref 10 ani în urmă
cpubase.pas c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 ani în urmă
cpuelf.pas d22dc68fda * fixed DFA warnings for MIPS and AVR 11 ani în urmă
cpugas.pas 244f65525b * MIPS: dropped gas_std_regname, its functionality merged into std_regname. This fixes register names in non-instructions (reg. allocation information, variable locations, etc.) and makes assembler listings more readable. 11 ani în urmă
cpuinfo.pas f85a8159ef * compiler/mips/cpuinfo.pas: removed "FPU_" prefixes from FPU names, not necessary because compiler inserts one itself. 11 ani în urmă
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: 11 ani în urmă
cpupara.pas c3350d13f9 * MIPS: floating point parameters on stack should be loaded to/from FPU registers directly, without using temp. 12 ani în urmă
cpupi.pas 96dd464bf2 * Moved fixup_jmps to target-specific classes for powerpc,powerpc64 and MIPS, cleaned out remaining $ifdef's. A slight functionality change is that fixup_jmps is now called before adding the procedure end symbol, not after, but that should not matter. 11 ani în urmă
cputarg.pas b2b26f84cf * partially merged the mips-embedded branch of Michael Ring: 11 ani în urmă
hlcgcpu.pas b2b26f84cf * partially merged the mips-embedded branch of Michael Ring: 11 ani în urmă
itcpugas.pas 3d2a27c66c * fix fpu register type 13 ani în urmă
mipsreg.dat e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 ani în urmă
ncpuadd.pas d9a7d28838 + MIPS: support floating point conditions in its emulated flags, on MIPS4+ convert such flags to registers using conditional move instructions (i.e. without branching). For older cores generated code remains the same. 11 ani în urmă
ncpucall.pas 87684e1cf1 * MIPS: clean up 11 ani în urmă
ncpucnv.pas 5655baa23a * MIPS: optimized conversion of unsigned 32-bit integers to float, now uses one integer register instead of two and does not generate redundant move. 11 ani în urmă
ncpuinln.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 11 ani în urmă
ncpuld.pas 4b820a1ca5 - Removed tcgloadnode.generate_picvaraccess, it is never used and is not necessary because PIC stuff is handled at lower levels. 12 ani în urmă
ncpumat.pas cd27d64cd5 + Support (as target-independent as possible) optimization of division by constants: 11 ani în urmă
ncpuset.pas e163a2c813 * MIPS and SPARC: determine whether case expression is in range using a single unsigned comparison (like it is done on other targets). 11 ani în urmă
opcode.inc 4e7c908b0d + MIPS: added movn and movz instructions. 11 ani în urmă
racpugas.pas e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 ani în urmă
rgcpu.pas 3b06465322 + MIPS: support replacement spilling for mov.s, mov.d and (partially) mtc1 instructions. 11 ani în urmă
rmipscon.inc e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 ani în urmă
rmipsdwf.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 ani în urmă
rmipsgas.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 ani în urmă
rmipsgri.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 ani în urmă
rmipsgss.inc f58fcdf401 + basic mips stuff 20 ani în urmă
rmipsnor.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 ani în urmă
rmipsnum.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 ani în urmă
rmipsrni.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 ani în urmă
rmipssri.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 ani în urmă
rmipssta.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 ani în urmă
rmipsstd.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 ani în urmă
rmipssup.inc e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 ani în urmă
strinst.inc 4e7c908b0d + MIPS: added movn and movz instructions. 11 ani în urmă
symcpu.pas 02495c17bd Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym". 11 ani în urmă