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aoptcpu.pas
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790a4fe2d3
* log and id tags removed
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20 lat temu |
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aoptcpub.pas
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790a4fe2d3
* log and id tags removed
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20 lat temu |
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aoptcpud.pas
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790a4fe2d3
* log and id tags removed
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20 lat temu |
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cgcpu.pas
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c939beee70
* Changed register allocation order for x86_64, putting first registers that don't need to be preserved by procedure. This way registers needing preservation are allocated less frequently (and for non-complex leaf functions not allocated at all), reducing amount of entry/exit code.
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14 lat temu |
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cpubase.inc
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cf36646238
* forgot to commit (part of r15350)
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15 lat temu |
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cpuinfo.pas
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5acf377e31
* enable node cse for all cpus as level 2 optimization
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15 lat temu |
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cpunode.pas
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0c675a4039
* the objc1 unit has been renamed to objc
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16 lat temu |
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cpupara.pas
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067536f8da
* pass large "const" record parameters by reference for non-cdecl/cppdecl
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15 lat temu |
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cpupi.pas
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e002e6b9f4
* Also execute setfirsttemp on non-Windows platforms. Fixes -O2 cycle on Linux.
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18 lat temu |
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cputarg.pas
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7686c36a62
+ Register Solaris
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16 lat temu |
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nx64add.pas
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53e52ac6a9
* implementation of 32x32->64 multiplication for i386 based on patch
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17 lat temu |
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nx64cal.pas
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15e9c54b44
* fixed ABI compliance for parameter passing and function returning on all
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15 lat temu |
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nx64cnv.pas
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f8369032da
* same fixes as in r16255 for x86_64 (fixes webtbs/tw17714 on Darwin/x86_64)
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15 lat temu |
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nx64inl.pas
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790a4fe2d3
* log and id tags removed
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20 lat temu |
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nx64mat.pas
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d1264eeb3a
* fixed optimized division of signed values by constant power of 2 if the
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15 lat temu |
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r8664ari.inc
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b1c8bfc478
+ x86_64 pic draft
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20 lat temu |
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r8664att.inc
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b1c8bfc478
+ x86_64 pic draft
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20 lat temu |
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r8664con.inc
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b1c8bfc478
+ x86_64 pic draft
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20 lat temu |
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r8664dwrf.inc
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b1c8bfc478
+ x86_64 pic draft
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20 lat temu |
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r8664int.inc
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21ae782854
* fixed more xmm stuff
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20 lat temu |
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r8664iri.inc
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f378d688d4
* fixed reading of registers in intel assembler mode on x86-64
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19 lat temu |
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r8664nor.inc
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b1c8bfc478
+ x86_64 pic draft
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20 lat temu |
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r8664num.inc
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b1c8bfc478
+ x86_64 pic draft
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20 lat temu |
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r8664op.inc
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5d243f665a
* fixed <instr> reg,reg with regs>=r8
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19 lat temu |
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r8664ot.inc
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b1c8bfc478
+ x86_64 pic draft
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20 lat temu |
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r8664rni.inc
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b1c8bfc478
+ x86_64 pic draft
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20 lat temu |
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r8664sri.inc
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b1c8bfc478
+ x86_64 pic draft
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20 lat temu |
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r8664stab.inc
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73b1fa667c
* use dwarf64 numbers for x86_64 stabs registers
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15 lat temu |
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r8664std.inc
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b1c8bfc478
+ x86_64 pic draft
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20 lat temu |
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rax64att.pas
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2adb00ac45
* enabled operand size checking (don't know why it was disabled,
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18 lat temu |
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rax64int.pas
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f726e1691b
* Fixed warnings and notes.
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16 lat temu |
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rgcpu.pas
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c6253d5bd7
* Added missing override directive in trgcpu.add_constraints method for x86_64 CPU. It was missing for years and I am not sure that this code is really needed. Please review.
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16 lat temu |
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x8664ats.inc
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9279c6955e
* support for SSSE3, SSE4,1, SSE4.2, AES instructions set by Emelyanov Roman, resolves #18527
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14 lat temu |
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x8664att.inc
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9279c6955e
* support for SSSE3, SSE4,1, SSE4.2, AES instructions set by Emelyanov Roman, resolves #18527
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14 lat temu |
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x8664int.inc
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9279c6955e
* support for SSSE3, SSE4,1, SSE4.2, AES instructions set by Emelyanov Roman, resolves #18527
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14 lat temu |
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x8664nop.inc
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9279c6955e
* support for SSSE3, SSE4,1, SSE4.2, AES instructions set by Emelyanov Roman, resolves #18527
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14 lat temu |
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x8664op.inc
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9279c6955e
* support for SSSE3, SSE4,1, SSE4.2, AES instructions set by Emelyanov Roman, resolves #18527
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14 lat temu |
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x8664pro.inc
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9279c6955e
* support for SSSE3, SSE4,1, SSE4.2, AES instructions set by Emelyanov Roman, resolves #18527
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14 lat temu |
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x8664tab.inc
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9279c6955e
* support for SSSE3, SSE4,1, SSE4.2, AES instructions set by Emelyanov Roman, resolves #18527
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14 lat temu |
sergei
c939beee70
* Changed register allocation order for x86_64, putting first registers that don't need to be preserved by procedure. This way registers needing preservation are allocated less frequently (and for non-complex leaf functions not allocated at all), reducing amount of entry/exit code.