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aasmcpu.pas
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cf0d808708
+ avr assemblers do not convert automatically cond. branches with too large jump distances into an unconditional branch and a reverse condition branch, so fpc does this now
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14 anni fa |
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agavrgas.pas
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1cc956afc8
+ implements tcgavr.a_loadaddr_ref_reg
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14 anni fa |
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aoptcpu.pas
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8f343078fa
* optimize moves into movw if possible
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14 anni fa |
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aoptcpub.pas
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bc73f9021c
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17 anni fa |
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aoptcpud.pas
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bc73f9021c
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17 anni fa |
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avrreg.dat
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bc73f9021c
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17 anni fa |
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cgcpu.pas
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6005ec2c91
+ a_jmp_cond implemented
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14 anni fa |
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cpubase.pas
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ff5f311b34
- removed no more used constants
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14 anni fa |
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cpuinfo.pas
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a08dfdf803
o slightly modified patch by John Clymer:
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14 anni fa |
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cpunode.pas
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9856e548ed
* avr stuff, work in progress
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16 anni fa |
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cpupara.pas
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a0b0b43d0c
+ implemented tcgavr.a_jmp_name
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14 anni fa |
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cpupi.pas
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e95bf26148
* avr stackframe generation improved
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14 anni fa |
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cputarg.pas
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0e13d07a31
+ more avr code
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17 anni fa |
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itcpugas.pas
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8d960cb608
+ implementation of shifting operations for avr
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14 anni fa |
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navradd.pas
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eb2a2a5ea0
+ implements tavraddnode.second_cmpsmallset
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14 anni fa |
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navrcnv.pas
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f419966f06
+ generic second_int_to_bool, depends on OP_OR setting flags
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14 anni fa |
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navrmat.pas
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26ce3cef00
* compilation fixes
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14 anni fa |
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raavr.pas
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0e13d07a31
+ more avr code
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17 anni fa |
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raavrgas.pas
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98d3007580
+ support to parse hi8/lo8(...) in inline assembler
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14 anni fa |
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ravrcon.inc
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bc73f9021c
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17 anni fa |
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ravrdwa.inc
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bc73f9021c
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17 anni fa |
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ravrnor.inc
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bc73f9021c
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17 anni fa |
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ravrnum.inc
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bc73f9021c
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17 anni fa |
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ravrrni.inc
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bc73f9021c
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17 anni fa |
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ravrsri.inc
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bc73f9021c
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17 anni fa |
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ravrsta.inc
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bc73f9021c
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17 anni fa |
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ravrstd.inc
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bc73f9021c
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17 anni fa |
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ravrsup.inc
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bc73f9021c
Merged revisions 5891-10167,10169-10180 via svnmerge from
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17 anni fa |
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rgcpu.pas
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53ee505d84
* fixed spilling
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14 anni fa |
florian
a08dfdf803
o slightly modified patch by John Clymer: