steve 5ed5c197dd merge till 33642 9 éve
..
aasmcpu.pas e0c21b6f8b ARM: avoid some range check errors, while running a compiler compiled with -CR 9 éve
agarmgas.pas 9d1646e2a8 Add support for writeback in RFE and SRS instructions. 9 éve
aoptcpu.pas 38fd0efa3b * don't conditionalise BL on ARM, because it may have to be converted to 9 éve
aoptcpub.pas d37e72dbf9 * ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions. 11 éve
aoptcpuc.pas 790a4fe2d3 * log and id tags removed 20 éve
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 éve
armatt.inc 9d1646e2a8 Add support for writeback in RFE and SRS instructions. 9 éve
armatts.inc 9d1646e2a8 Add support for writeback in RFE and SRS instructions. 9 éve
armins.dat c564acd378 * fix assembling of vfnm* 9 éve
armnop.inc 439027a8de Add most pre-UAL VFP instruction forms. 10 éve
armop.inc 9d1646e2a8 Add support for writeback in RFE and SRS instructions. 9 éve
armreg.dat 387824c1ee Added some APSR register bitmask definitions. 10 éve
armtab.inc c564acd378 * fix assembling of vfnm* 9 éve
cgcpu.pas ad71b8348e * S1..S15 do not need to be marked as volatile as they are sub-registers of double size registers 9 éve
cpubase.pas ad71b8348e * S1..S15 do not need to be marked as volatile as they are sub-registers of double size registers 9 éve
cpuelf.pas 1b02dd27dc Make relocation type more precise compared to output of gas. 9 éve
cpuinfo.pas cb4773432b + hardfloat directive (arm only): use hard float calling conventions regardless of the abi, resolves #29715 9 éve
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: 11 éve
cpupara.pas 5ed5c197dd merge till 33642 9 éve
cpupi.pas 1c067e96bf * fix VFPv4 support 9 éve
cputarg.pas d26f0552a0 * Sync with trunk r23404. 12 éve
hlcgcpu.pas 432248cbf1 * Removed lot of unused vars. 10 éve
itcpugas.pas 47d43750e4 * remove unused units from uses statements 12 éve
narmadd.pas e1546303f8 + enable use of vfma and friends on arm when doing fastmath optimizations 9 éve
narmcal.pas cb4773432b + hardfloat directive (arm only): use hard float calling conventions regardless of the abi, resolves #29715 9 éve
narmcnv.pas 1c067e96bf * fix VFPv4 support 9 éve
narmcon.pas b0ff41406a * grouped all tai_real* types into a single tai_realconst type, 11 éve
narminl.pas 3c6d4f1ee2 * Removed unused vars. 9 éve
narmmat.pas 1c067e96bf * fix VFPv4 support 9 éve
narmmem.pas d6de2c03cb * generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe 10 éve
narmset.pas da696057ab * converted register_maybe_adjust_setbase() to the high level code generator 9 éve
pp.lpi.template 1f032375c3 * improved template with help from Mattias Gaertner 19 éve
raarm.pas 780e75bfac o patch by Jeppe Johansen to fix mantis #17472: 14 éve
raarmgas.pas 37cb35d780 + support for the .code directive in arm inline assembler 9 éve
rarmcon.inc 387824c1ee Added some APSR register bitmask definitions. 10 éve
rarmdwa.inc 387824c1ee Added some APSR register bitmask definitions. 10 éve
rarmnor.inc 387824c1ee Added some APSR register bitmask definitions. 10 éve
rarmnum.inc 387824c1ee Added some APSR register bitmask definitions. 10 éve
rarmrni.inc 387824c1ee Added some APSR register bitmask definitions. 10 éve
rarmsri.inc 387824c1ee Added some APSR register bitmask definitions. 10 éve
rarmsta.inc 387824c1ee Added some APSR register bitmask definitions. 10 éve
rarmstd.inc 387824c1ee Added some APSR register bitmask definitions. 10 éve
rarmsup.inc 387824c1ee Added some APSR register bitmask definitions. 10 éve
rgcpu.pas 6207a53f5d * never allocate odd numbered single-sized registers 9 éve
symcpu.pas 7dd1d6aa77 o fixes handling of iso i/o parameters/program parameters: 10 éve