Jonas Maebe d452686c39 * moved pbestrealtype from symdef to symcpu 11 년 전
..
aasmcpu.pas 20dbda751a * fixed sparc compilation after addr_lo/hi changes 18 년 전
aoptcpu.pas da910d654c + SPARC: two more peephole optimizations 11 년 전
aoptcpub.pas 2f5ce095ce * RefsHaveIndexReg -> cpurefshaveindexreg 13 년 전
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 년 전
cgcpu.pas 534ecbda9f * SPARC: r26561 caused a_op_const_reg_reg used for zero-extending 8-bit values to be optimized away. Fixed by replacing it with an explicit instruction. 11 년 전
cpubase.pas eaba90dda7 * SPARC: since peephole optimizer recognizes only one conditional branching instruction, generate all branches using A_Bxx opcode, and change it to A_FBxx if necessary when writing assembler. This enables optimization of floating-point branches. 11 년 전
cpuelf.pas 0aa7204707 + Added codes of dynamic relocations to TElfTarget; since most targets use similar dynamic relocation model differing only in code values, this will allow to do majority of handling in the base class. 12 년 전
cpugas.pas 5e6669890a Handle asmextraopt in powerpc, mips and sparc assemblers 11 년 전
cpuinfo.pas e190f76dd9 * removed spaces from sparc cpu name strings so they can be much easier used 13 년 전
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: 11 년 전
cpupara.pas 2c02e8a726 - i386, x86_64, SPARC: removed paramanager.getintparaloc overrides, it is handled by generic implementation since r24716. 11 년 전
cpupi.pas 176d8434e4 * SPARC: completely rewrote PIC-related code, got it twice shorter in source lines and much less instructions in generated code. 11 년 전
cputarg.pas 7587145320 Add possibility to test sparc elf generator with -dTEST_AGSPARC_ELF 13 년 전
hlcgcpu.pas 72e9cfee24 * create/destroy also the high level code generator for all architectures, 14 년 전
itcpugas.pas 790a4fe2d3 * log and id tags removed 20 년 전
ncpuadd.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 11 년 전
ncpucall.pas 51825b6f2e compiler: change ret_in_param to accept tabstractprocdef instead of tproccalloption to allow check more options (required for record constructor implementation) 12 년 전
ncpucnv.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 11 년 전
ncpuinln.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 11 년 전
ncpumat.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 11 년 전
ncpuset.pas e163a2c813 * MIPS and SPARC: determine whether case expression is in range using a single unsigned comparison (like it is done on other targets). 11 년 전
opcode.inc 9a486d73ba + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. 11 년 전
racpu.pas 18eb495d0f * give a regular error message instead of an internal error on x86 18 년 전
racpugas.pas eaba90dda7 * SPARC: since peephole optimizer recognizes only one conditional branching instruction, generate all branches using A_Bxx opcode, and change it to A_FBxx if necessary when writing assembler. This enables optimization of floating-point branches. 11 년 전
rgcpu.pas d2a9308181 + SPARC: implemented register spill replacement. 11 년 전
rspcon.inc c3da1aa542 Reenabled D0-D30 registers 13 년 전
rspdwrf.inc c3da1aa542 Reenabled D0-D30 registers 13 년 전
rspnor.inc c3da1aa542 Reenabled D0-D30 registers 13 년 전
rspnum.inc c3da1aa542 Reenabled D0-D30 registers 13 년 전
rsprni.inc c3da1aa542 Reenabled D0-D30 registers 13 년 전
rspsri.inc c3da1aa542 Reenabled D0-D30 registers 13 년 전
rspstab.inc c3da1aa542 Reenabled D0-D30 registers 13 년 전
rspstd.inc c3da1aa542 Reenabled D0-D30 registers 13 년 전
rspsup.inc c3da1aa542 Reenabled D0-D30 registers 13 년 전
spreg.dat c3da1aa542 Reenabled D0-D30 registers 13 년 전
strinst.inc 9a486d73ba + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. 11 년 전
symcpu.pas d452686c39 * moved pbestrealtype from symdef to symcpu 11 년 전