 florian
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5bb4049737
* remove accidently committed debug statement
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hai 6 meses |
|
florian
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971d97c179
+ RiscV: make use of the fmv.w.x/fmv.d.x instruction to load 0.0
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hai 6 meses |
|
florian
|
1202b2612f
+ RiscV: make use of the fl* rd,symbol,rd pseudoinstruction
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hai 6 meses |
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florian
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c3110dfaa9
+ RiscV: make use of the fneg.* instruction
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hai 7 meses |
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florian
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2c5a070959
+ random bits for quad support on RiscV
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hai 7 meses |
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florian
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27a0da5a20
* typo corrected
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hai 8 meses |
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florian
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6ef37d999a
+ Risc-V: instructions of B extension
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hai 1 ano |
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florian
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a05aa25aad
* Risc-V: allow also register aliases in register modification lists after asm blocks, last part to resolve #39738
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%!s(int64=3) %!d(string=hai) anos |
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florian
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ec3a04da9b
+ forgotten pseudo-instructions added
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%!s(int64=3) %!d(string=hai) anos |
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florian
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eaeb8b70ff
+ added Risc-V register information file generation to the compiler Makefile
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%!s(int64=3) %!d(string=hai) anos |
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florian
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4556cb35d1
+ completed Risc-V 64 pseudo instructions
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%!s(int64=3) %!d(string=hai) anos |
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florian
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6a00f9f403
* unified Risc-V 32 and 64 cpubase.pas
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%!s(int64=3) %!d(string=hai) anos |
