| .. |
|
aasmcpu.pas
|
4e2fb9d28b
* MIPS: fixed O_MOVE_SOURCE and O_MOVE_DEST constants (they were swapped, amazing that it ever worked with such a mistake).
|
11 년 전 |
|
aoptcpu.pas
|
a709a9b637
* MIPS peephole: check that operand is present before accessing its fields, also check that it's not a branch target. Mantis #27608.
|
10 년 전 |
|
aoptcpub.pas
|
93e0dd9c2f
* Patch from Fuxin Zhang: other mips and mipsel CPUs changes
|
13 년 전 |
|
aoptcpud.pas
|
0c8546f94c
* more MIPS code of David Zhang integrated
|
15 년 전 |
|
cgcpu.pas
|
61e4a1b811
+ added tasmlist parameter to getintparaloc() (needed for llvm)
|
10 년 전 |
|
cpubase.pas
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
11 년 전 |
|
cpuelf.pas
|
919cc8377a
+ added class type property CObjSymbol to TExeOutput as well
|
10 년 전 |
|
cpugas.pas
|
991e1f49bd
* store a pointer to the used tasminfo record in every assembler writer, so
|
10 년 전 |
|
cpuinfo.pas
|
3cb9be73bc
Moved tcontrollerdatatype out into cpuinfo.
|
10 년 전 |
|
cpunode.pas
|
b57c95043f
+ support overriding tdef/tsym methods with target-specific functionality:
|
11 년 전 |
|
cpupara.pas
|
f402b0d7df
* changed getpointerdef() into a tpointerdef.getreusable() class method
|
10 년 전 |
|
cpupi.pas
|
96dd464bf2
* Moved fixup_jmps to target-specific classes for powerpc,powerpc64 and MIPS, cleaned out remaining $ifdef's. A slight functionality change is that fixup_jmps is now called before adding the procedure end symbol, not after, but that should not matter.
|
11 년 전 |
|
cputarg.pas
|
b2b26f84cf
* partially merged the mips-embedded branch of Michael Ring:
|
11 년 전 |
|
hlcgcpu.pas
|
b745dcc64c
* moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because
|
11 년 전 |
|
itcpugas.pas
|
3d2a27c66c
* fix fpu register type
|
13 년 전 |
|
mipsreg.dat
|
e367ccc0ee
* MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names.
|
11 년 전 |
|
ncpuadd.pas
|
0fc1fd6ac1
* replaced current_procinfo.currtrue/falselabel with storing the true/false
|
10 년 전 |
|
ncpucall.pas
|
87684e1cf1
* MIPS: clean up
|
11 년 전 |
|
ncpucnv.pas
|
0fc1fd6ac1
* replaced current_procinfo.currtrue/falselabel with storing the true/false
|
10 년 전 |
|
ncpuinln.pas
|
4065483a50
* completed thlcgobj.location_force_fpureg(), use it everywhere and removed
|
11 년 전 |
|
ncpuld.pas
|
4b820a1ca5
- Removed tcgloadnode.generate_picvaraccess, it is never used and is not necessary because PIC stuff is handled at lower levels.
|
12 년 전 |
|
ncpumat.pas
|
7949bebb8d
* synchronised with r28168 of trunk
|
11 년 전 |
|
ncpuset.pas
|
e163a2c813
* MIPS and SPARC: determine whether case expression is in range using a single unsigned comparison (like it is done on other targets).
|
11 년 전 |
|
opcode.inc
|
4e7c908b0d
+ MIPS: added movn and movz instructions.
|
11 년 전 |
|
racpugas.pas
|
e367ccc0ee
* MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names.
|
11 년 전 |
|
rgcpu.pas
|
67b8aceaee
* synchronized with privatetrunk till r30095
|
10 년 전 |
|
rmipscon.inc
|
e367ccc0ee
* MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names.
|
11 년 전 |
|
rmipsdwf.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
11 년 전 |
|
rmipsgas.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
11 년 전 |
|
rmipsgri.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
11 년 전 |
|
rmipsgss.inc
|
f58fcdf401
+ basic mips stuff
|
20 년 전 |
|
rmipsnor.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
11 년 전 |
|
rmipsnum.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
11 년 전 |
|
rmipsrni.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
11 년 전 |
|
rmipssri.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
11 년 전 |
|
rmipssta.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
11 년 전 |
|
rmipsstd.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
11 년 전 |
|
rmipssup.inc
|
e367ccc0ee
* MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names.
|
11 년 전 |
|
strinst.inc
|
4e7c908b0d
+ MIPS: added movn and movz instructions.
|
11 년 전 |
|
symcpu.pas
|
7dd1d6aa77
o fixes handling of iso i/o parameters/program parameters:
|
10 년 전 |
Jonas Maebe
991e1f49bd
* store a pointer to the used tasminfo record in every assembler writer, so