Commit History

Autor SHA1 Mensaxe Data
  florian e1e8986462 * patch by J. Gareth Moreton, issue #36271, part 3: support for the other architectures %!s(int64=5) %!d(string=hai) anos
  florian 69786ffe73 somehow committing went wrong, second part of last commit: %!s(int64=6) %!d(string=hai) anos
  florian 5a379cc256 * fix detection of floating point constants for arm %!s(int64=6) %!d(string=hai) anos
  Jonas Maebe 1b6425176b * synchronised with trunk till r42049 %!s(int64=6) %!d(string=hai) anos
  Jonas Maebe 281b3ad276 * fix case completeness and unreachable code warnings in compiler that would %!s(int64=6) %!d(string=hai) anos
  Jonas Maebe a079e5fa80 * synchronised with trunk till r41449 %!s(int64=6) %!d(string=hai) anos
  Jonas Maebe 7c4e7d6bd3 * support OS_32/OS_64 in cgsize2subreg for ARM MM registers to handle %!s(int64=6) %!d(string=hai) anos
  Jonas Maebe bfc7c58a69 * synchronised with trunk till r40348 %!s(int64=6) %!d(string=hai) anos
  pierre 4657f45e74 * Change first parameter type of function is_continuous_maks to aword type. %!s(int64=6) %!d(string=hai) anos
  Jonas Maebe 8555ec1438 + fpc_eh_return_data_regno() intrinsic to get the return register numbers %!s(int64=6) %!d(string=hai) anos
  pierre 92acd38f40 Fix for bug report #34380 %!s(int64=6) %!d(string=hai) anos
  florian 4f5f3c4a09 + support for vmov.xx vreg,#imm on arm %!s(int64=7) %!d(string=hai) anos
  nickysn 518cdf9674 * replaced the saved_XXX_registers arrays with virtual methods inside %!s(int64=7) %!d(string=hai) anos
  Jonas Maebe 880d438704 * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can %!s(int64=8) %!d(string=hai) anos
  florian ad71b8348e * S1..S15 do not need to be marked as volatile as they are sub-registers of double size registers %!s(int64=9) %!d(string=hai) anos
  Jeppe Johansen 5ca1740bee Fix issue in is_thumb32_imm. imm<11:10> have to be non-zero meaning the rotate only works from 8 to 31. Caused 0x8000001F to be mistaken for a valid immediate. %!s(int64=10) %!d(string=hai) anos
  Jeppe Johansen 3d7dce81fe Make MRS and MSR use the right encoding on Thumb architectures. %!s(int64=10) %!d(string=hai) anos
  Jeppe Johansen 71cdedea82 Add missing NOP, and B instruction forms. %!s(int64=10) %!d(string=hai) anos
  Jeppe Johansen 5c3093a937 Add most non-VFP Thumb-2 instruction entries for the ARM internal writer. %!s(int64=10) %!d(string=hai) anos
  Jeppe Johansen d023c63ad0 Add a lot of instruction table entries and missing instructions for support of most ARM32 mode instructions from ARMv4 up ARMv7A. %!s(int64=10) %!d(string=hai) anos
  masta fb52392e20 Reformat and comment is_thumb32_imm %!s(int64=11) %!d(string=hai) anos
  svenbarth c48d572996 Implement support for saving and restoring address registers. %!s(int64=11) %!d(string=hai) anos
  florian d4968e054b + arm: tsettings.instructionset %!s(int64=12) %!d(string=hai) anos
  florian 086ae4b999 Merge r22905 and r22906 %!s(int64=12) %!d(string=hai) anos
  florian 1eeeb309c7 * intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet %!s(int64=12) %!d(string=hai) anos
  florian 47d43750e4 * remove unused units from uses statements %!s(int64=12) %!d(string=hai) anos
  masta e327b4581c Use TRegNameTable instead of array[tregisterindex] of string[10] %!s(int64=12) %!d(string=hai) anos
  Jeppe Johansen 4e84431dde Fix some optimizations which assume that there are 3 operands %!s(int64=12) %!d(string=hai) anos
  Jeppe Johansen 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) %!s(int64=12) %!d(string=hai) anos
  Jeppe Johansen a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU %!s(int64=13) %!d(string=hai) anos